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Latest version
Version: 1.7.10.1
Release date: 17 Oct 2025
TICS Pro 1.7.10.1 installer binary for Windows operating system
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Clock generators
Clock buffers
Oscillators
Clock jitter cleaners
Clock network synchronizers
RF PLLs & synthesizers
Hardware development
LMK04208EVM
—
Two Input, 6+1 Output, Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.9 GHz VCO
LMK04805BEVAL
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Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.2 GHz VCO
LMK04806BEVAL
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Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.5 GHz VCO
LMK04816BEVAL
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Three Input, Thirteen Output, Clock Jitter Cleaner with Dual Cascaded PLLs and Integrated 2.5 GHz VC
LMK04832EVM
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LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module
LMK04832SEPEVM
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LMK04832-SEP evaluation module for ultra-low-noise, 3.2-GHz 15-output clock jitter clea
LMK04906BEVAL
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Three Input, Seven Output, Clock Jitter Cleaner with Dual Cascaded PLLs and Integrated 2.5 GHz VCO
LMK5B33216EVM
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LMK5B33216 evaluation module for 16-output, three DPLL and APLL, network synchronizer with BAW VCO
LMX2571EPEVM
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LMX2571-EP evaluation module for 1.34-GHz, low-power, extreme-temperature RF synthesizer
LMX2582EVM
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LMX2582EVM High Performance, Wideband Frequency PLLatinum RF Synthesizer With Integrated VCO
LMX2592EVM
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LMX2592EVM high-performance, wideband frequency RF synthesizer PLLATINUM™ integrated circuit
LMX2594PSEVM
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LMX2594 evaluation module for 15-GHz RF synthesizer with multiple-device phase synchronization
LMK04832EVM-CVAL
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LMK04832-SP evaluation module for ultra-low-noise, dual-loop, JESD204B clock jitter cleaner
LMK04368EPEVM
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LMK04368-EP evaluation module for JESD204B/C dual-loop clock jitter cleaner
LMK61E0MEVM
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LMK61E0M Ultra-Low-Jitter Programmabler Oscillator Evaluation Module
LMK61E2EVM
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LMK61E2EVM Ultra-Low-Jitter Programmable Oscillator Evaluation Module
LMX1204EVM
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LMX1204 evaluation module for RF buffer, multiplier and divider with JESD204B/C SYSREF support
LMX2594EVM
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LMX2594EVM 15-GHz wideband RF synthesizer with phase synchronization & JESD204B evaluation module
LMX2595EVM
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20-GHz Wideband RF Synthesizer With Phase Synchronization and JESD204B Evaluation Module
LMX2694EPEVM
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15-GHz wideband RF synthesizer evaluation module
LMX2572EVM
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6.4-GHz Low Power Wideband RF Synthesizer with Phase Synchronization and JESD204B Support
LMX2572LPEVM
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2-GHz Low Power Wideband RF Synthesizer with FSK Modulation Evaluation Module
LMX2820EVM
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LMX2820 22.6-GHz wideband RF synthesizer evaluation module
LMK5B33414EVM
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LMK5B33414 evaluation module for 14-output, three DPLL and APLL, network synchronizer with BAW VCO
LMK5C33216EVM
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LMK5C33216 clock synchronizer DPLL 2 input 16 outputs evaluation module
LMK05028EVM
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LMK05028 Network Clock Generator and Synchronizer Evaluation Module
CDCI6214EVM
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CDCI6214 Ultra-Low Power Clock Generator Evaluation Module
CDCE6214-Q1EVM
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4 differential and 1 LVCMOS outputs clock generator evaluation module
TICS Pro 1.7.10.1 Release Notes
TICS Pro 1.7.10.1 Software Manifest
v1.7.10.1 contains a bugfix for ReadAllRegisters API introduced in v1.7.10.0, and replaces v1.7.10.0.
Devices
Improvements
- See release notes for complete list of updates
- APIs for GetAllRegisters, GetTableData, ImportRegisters, ExportRegisters, and CloseTICSPro added
- ReadAllRegisters API returns values
Bugfixes
- Reading all registers in Simulation/DemoMode no longer overwrites registers with zeros
- ti_ticspro library TICSProOptions.FromFile method fixed
Known Issues
- LMK5B and LMK5C family - In some cases, "Assign Selected VCO Settings to Device" and "Apply Output Clock Settings to Device" may need to be pressed twice for certain cascaded configurations to display correctly
- LMK05318 - In some cases, it is necessary to press "Calculate Frequency Plan" twice for correct VCO2 frequency. This issue is resolved in LMK05318B GUI.
- Burst mode page looping requires long delays to halt, and halting may crash the GUI. If possible, do not loop in burst mode.
- User Controls page can sometimes become desynchronized from Raw Registers and other pages. Refer to Raw Registers or other pages for correct values. Saving/Loading and Import/Export of register data is unaffected, and register data will still be written to and read from connected devices correctly.
- Added new APIs: GetAllRegisters, GetTableData, ImportRegisters, ExportRegisters, and CloseTICSPro
- ReadAllRegisters API returns values
- Reading all registers in Simulation/DemoMode no longer overwrites registers with zeros
- ti_ticspro library TICSProOptions.FromFile method fixed
- Added LMK5D33414
Download options
Latest version
Version: 01.00.00.0E
Release date: 20 Dec 2015
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Requires export approval (1 minute)
Clock generators
Clock buffers
Clock jitter cleaners
RF PLLs & synthesizers
Hardware development
LMK01000EVAL
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1.6 GHz Low Noise Clock Buffer, Divider, and Distributor
LMK03033CEVAL
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Precision Clock Conditioner with Integrated VCO (1843 - 2160 MHz)
The design resource accessed as www.ti.com/lit/zip/snac014 or www.ti.com/lit/xx/snac014e/snac014e.zip has been migrated to a new user experience at www.ti.com/tool/download/SNAC014. Please update any bookmarks accordingly.