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XOR (exclusive OR) gates

SN54AHCT86

ACTIVE

Military 4-ch, 2-input, 4.5-V to 5.5-V XOR (exclusive OR) gates with TTL-compatible CMOS inputs

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Data sheet

SN54AHCT86

ACTIVE
Data sheet Order now

Product details

Technology family AHCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 8 Input type TTL-Compatible CMOS IOH (max) (mA) -8 Output type Push-Pull Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 70 Rating Military Operating temperature range (°C) -55 to 125
Technology family AHCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 8 Input type TTL-Compatible CMOS IOH (max) (mA) -8 Output type Push-Pull Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 70 Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² 19.56 x 6.67 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • Inputs are TTL-voltage compatible
  • Latch-up performance exceeds 250 mA per JESD 17
  • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
  • ESD protection exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
  • Inputs are TTL-voltage compatible
  • Latch-up performance exceeds 250 mA per JESD 17
  • On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
  • ESD protection exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

The SNx4AHCT86 devices are quadruple 2-input exclusive-OR gates. These devices perform the Boolean function Y = A × B or Y = AB + A B in positive logic.

The SNx4AHCT86 devices are quadruple 2-input exclusive-OR gates. These devices perform the Boolean function Y = A × B or Y = AB + A B in positive logic.
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Technical documentation

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Type Title Date
* Data sheet SNx4AHCT86 Quadruple 2-Input Exclusive-OR Gates datasheet (Rev. P) PDF | HTML 17 Oct 2023
* SMD SN54AHCT86 SMD 5962-96817 21 Jun 2016
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
Application note Advanced High-Speed CMOS (AHC) Logic Family (Rev. C) 02 Dec 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Design guide AHC/AHCT Designer's Guide February 2000 (Rev. D) 24 Feb 2000
Product overview Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C) 01 Apr 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Live Insertion 01 Oct 1996

Design & development

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Package Pins CAD symbols, footprints & 3D models
CDIP (J) 14 Ultra Librarian
LCCC (FK) 20 Ultra Librarian
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