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SN54SC8T240-SEP

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Radiation-tolerant 8-bit inverting fixed-direction level translator with 3-state outputs

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Data sheet

SN54SC8T240-SEP

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Data sheet Order now

Product details

Technology family LVT Applications GPIO, SPI Bits (#) 8 High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 5.5 Data rate (max) (Mbps) 150 IOH (max) (mA) -24 IOL (max) (mA) 24 Supply current (max) (µA) 220 Features Output enable, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Space Operating temperature range (°C) -55 to 125
Technology family LVT Applications GPIO, SPI Bits (#) 8 High input voltage (min) (V) 0.78 High input voltage (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 5.5 Data rate (max) (Mbps) 150 IOH (max) (mA) -24 IOL (max) (mA) 24 Supply current (max) (µA) 220 Features Output enable, Partial power down (Ioff), Vcc isolation Input type Standard CMOS Output type 3-State, Balanced CMOS, Push-Pull Rating Space Operating temperature range (°C) -55 to 125
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Vendor item drawing available, VID V62/25630-01XE
  • Radiation - Total Ionizing Dose (TID):
    • TID characterized up to 50krad(Si)
    • TID performance assurance up to 30 krad(Si)
    • Radiation Lot Acceptance Testing (RLAT) for every wafer lot up to 30krad(Si)
  • Radiation - Single-Event Effects (SEE):
    • Single Event Latch-Up (SEL) immune up to 50MeV-cm2/mg at 125°C
    • Single Event Transient (SET) characterized up to LET = 50MeV-cm2/mg

  • Wide operating range of 1.2V to 5.5V

  • Single-supply voltage translator:

    • Up translation:

      • 1.2V to 1.8V

      • 1.5V to 2.5V

      • 1.8V to 3.3V

      • 3.3V to 5.0V

    • Down translation:

      • 5.0V, 3.3V, 2.5V to 1.8V
      • 5.0V, 3.3V to 2.5V
      • 5.0V to 3.3V
  • 5.5V tolerant input pins
  • Supports standard pinouts
  • Up to 150Mbps with 5V or 3.3V VCC
  • Latch-up performance exceeds 250mA per JESD 17
  • Space enhanced plastic:
    • Supports defense and aerospace applications
    • Controlled baseline
    • Au bondwire and NiPdAu lead finish
    • Meets NASA ASTM E595 outgassing specification
    • One fabrication, assembly, and test site
    • Extended product life cycle
    • Product traceability
  • Vendor item drawing available, VID V62/25630-01XE
  • Radiation - Total Ionizing Dose (TID):
    • TID characterized up to 50krad(Si)
    • TID performance assurance up to 30 krad(Si)
    • Radiation Lot Acceptance Testing (RLAT) for every wafer lot up to 30krad(Si)
  • Radiation - Single-Event Effects (SEE):
    • Single Event Latch-Up (SEL) immune up to 50MeV-cm2/mg at 125°C
    • Single Event Transient (SET) characterized up to LET = 50MeV-cm2/mg

  • Wide operating range of 1.2V to 5.5V

  • Single-supply voltage translator:

    • Up translation:

      • 1.2V to 1.8V

      • 1.5V to 2.5V

      • 1.8V to 3.3V

      • 3.3V to 5.0V

    • Down translation:

      • 5.0V, 3.3V, 2.5V to 1.8V
      • 5.0V, 3.3V to 2.5V
      • 5.0V to 3.3V
  • 5.5V tolerant input pins
  • Supports standard pinouts
  • Up to 150Mbps with 5V or 3.3V VCC
  • Latch-up performance exceeds 250mA per JESD 17
  • Space enhanced plastic:
    • Supports defense and aerospace applications
    • Controlled baseline
    • Au bondwire and NiPdAu lead finish
    • Meets NASA ASTM E595 outgassing specification
    • One fabrication, assembly, and test site
    • Extended product life cycle
    • Product traceability

The SN54SC8T240-SEP device contains eight independent inverting line drivers with 3-state outputs. Each channel performs the Boolean function Y = A in positive logic. The channels are grouped in sets of four, with one OE pin controlling each set. The outputs can be put into a hi-Z state by applying a high on the associated OE pin.

The SN54SC8T240-SEP device contains eight independent inverting line drivers with 3-state outputs. Each channel performs the Boolean function Y = A in positive logic. The channels are grouped in sets of four, with one OE pin controlling each set. The outputs can be put into a hi-Z state by applying a high on the associated OE pin.
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Technical documentation

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Type Title Date
* Data sheet SN54SC8T240-SEP Radiation Tolerant, Octal Inverting Buffers/Drivers with 3-State Outputs datasheet PDF | HTML 21 Jan 2025
* Radiation & reliability report SN54SC8T240-SEP Production Flow and Reliability Report PDF | HTML 21 Feb 2025
* Radiation & reliability report SN54SC8T240-SEP Total Ionizing Dose (TID) Report 20 Feb 2025
* Radiation & reliability report SN54SC8T541-SEP Single Event Effects Report PDF | HTML 16 Jan 2025

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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TSSOP (PW) 20 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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