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SN74HCS32

ACTIVE

4-ch, 2-input 2-V to 6-V high-speed (12 ns) OR gate with Schmitt-trigger inputs

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Data sheet

SN74HCS32

ACTIVE
Data sheet Order now

Product details

Technology family HCS Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Input type Schmitt-Trigger Output type Push-Pull Features High speed (tpd 10- 50ns) Data rate (max) (Mbps) 130 Rating Catalog Operating temperature range (°C) -40 to 125
Technology family HCS Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 7.8 IOH (max) (mA) -7.8 Input type Schmitt-Trigger Output type Push-Pull Features High speed (tpd 10- 50ns) Data rate (max) (Mbps) 130 Rating Catalog Operating temperature range (°C) -40 to 125
SOIC (D) 14 51.9 mm² 8.65 x 6 SOT-23-THN (DYY) 14 13.692 mm² 4.2 x 3.26 TSSOP (PW) 14 32 mm² 5 x 6.4 WQFN (BQA) 14 7.5 mm² 3 x 2.5
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • Extended ambient temperature range: –40°C to +125°C, TA
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • Extended ambient temperature range: –40°C to +125°C, TA

This device contains four independent 2-input OR Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A + B in positive logic.

This device contains four independent 2-input OR Gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A + B in positive logic.
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Technical documentation

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Type Title Date
* Data sheet SN74HCS32 Quadruple 2-Input OR Gates with Schmitt-Trigger Inputs datasheet (Rev. C) PDF | HTML 07 Dec 2021
Product overview Generate a Timed Pulse Using a Binary Counter PDF | HTML 14 Jun 2023
Application brief Optimizing Board Space for Discrete LOGIC Designs Using Smallest Package Solutio (Rev. A) PDF | HTML 29 Sep 2022
Application brief User Fewer Inputs to Monitor Error Signals PDF | HTML 16 Jul 2021

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74HCS32 Behavioral SPICE Model

SCLM300.ZIP (7 KB) - PSpice Model
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Simulation model

SN74HCS32 IBIS Model (Rev. B)

SCLM161B.ZIP (51 KB) - IBIS Model
Download
Package Pins CAD symbols, footprints & 3D models
SOIC (D) 14 Ultra Librarian
SOT-23-THN (DYY) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
WQFN (BQA) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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