The SN74LV4T02-EP
contains four independent 2-input NOR Gates with
extended voltage operation to allow for level
translation. Each gate performs the Boolean function
Y = A + B in positive logic.
The output level is referenced to the supply voltage
(V CC) and supports 1.2-V, 1.8-V, 2.5-V,
3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). Additionally, the 5-V tolerant input pins enable down translation (for example 3.3 V to 2.5 V output).
The SN74LV4T02-EP
contains four independent 2-input NOR Gates with
extended voltage operation to allow for level
translation. Each gate performs the Boolean function
Y = A + B in positive logic.
The output level is referenced to the supply voltage
(V CC) and supports 1.2-V, 1.8-V, 2.5-V,
3.3-V, and 5-V CMOS levels.
The input is designed with a lower threshold circuit to support up translation for lower voltage CMOS inputs (for example 1.2 V input to 1.8 V output or 1.8 V input to 3.3 V output). Additionally, the 5-V tolerant input pins enable down translation (for example 3.3 V to 2.5 V output).