The SN74LVC1G79-Q1 device is an automotive AEC-Q100 qualified single positive-edge-triggered D-type flip-flop that is designed for 1.65V to 5.5V VCC operation.
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the level at the output.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | SN74LVC1G79 -Q1 Single Positive-Edge-Triggered D-Type Flip-Flop datasheet (Rev. A) | PDF | HTML | Aug 14, 2026 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOT-SC70 (DCK) | 5 | Ultra Librarian |
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