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XOR (exclusive OR) gates

SN74LVC86A

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4-channel 2-input 1.1V to 3.6V XOR (exclusive OR) gates

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Data sheet

SN74LVC86A

ACTIVE
Data sheet Order now

Product details

Technology family LVC Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 Input type Standard CMOS IOH (max) (mA) -24 Output type Push-Pull Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LVC Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 Input type Standard CMOS IOH (max) (mA) -24 Output type Push-Pull Features High speed (tpd 10-50ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) WQFN (BQA) 14 7.5 mm² (3 mm × 2.5 mm) SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) VQFN (RGY) 14 12.25 mm² (3.5 mm × 3.5 mm) SSOP (DB) 14 48.36 mm² (6.2 mm × 7.8 mm)
  • Operate from 1.65V to 3.6V
  • Specified from –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C
  • Inputs accept voltages to 5.5V
  • Max tpd of 4.6ns at 3.3V
  • Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250 mA per JESD 17
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114-A)
    • 1000V charged-device model (C101)
  • Operate from 1.65V to 3.6V
  • Specified from –40°C to 85°C, –40°C to 125°C, and –55°C to 125°C
  • Inputs accept voltages to 5.5V
  • Max tpd of 4.6ns at 3.3V
  • Typical VOLP (output ground bounce) <0.8V at VCC = 3.3V, TA = 25°C
  • Typical VOHV (output VOH undershoot) >2V at VCC = 3.3V, TA = 25°C
  • Latch-up performance exceeds 250 mA per JESD 17
  • ESD protection exceeds JESD 22
    • 2000V human-body model (A114-A)
    • 1000V charged-device model (C101)

The SN54LVC86A quadruple 2-input exclusive-OR gate is designed for 2.7V to 3.6V VCC operation, and the SN74LVC86A quadruple 2-input exclusive-OR gate is designed for 1.65V to 3.6V VCC operation.

The SN54LVC86A quadruple 2-input exclusive-OR gate is designed for 2.7V to 3.6V VCC operation, and the SN74LVC86A quadruple 2-input exclusive-OR gate is designed for 1.65V to 3.6V VCC operation.
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Technical documentation

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* Data sheet SNx4LVC86A Quadruple 2-Input Exclusive-OR Gates datasheet (Rev. R) PDF | HTML Aug 2, 2024

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

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Simulation model

SN74LVC86A Behavioral SPICE Model

SCAM095.ZIP (7 KB) - PSpice model
Supported products & hardware
Simulation model

SN74LVC86A IBIS Model (Rev. B)

SCEM060B.ZIP (35 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 14 Ultra Librarian
WQFN (BQA) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian
SSOP (DB) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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