Special Note: Customers looking to evaluate the ADS528x, should order a ADS528xEVM, a ADSDESER-50EVM, and a ADSDESER-50EVM Adapter Card.
The ADS5281EVM provides a platform for evaluating the eight-channel ADS5281 analog-to-digital converter (ADC) under various signal, reference, and supply conditions.
The EVM provides an external SMA connector for eight analog inputs to the ADC and the input of the ADC clock. The ADC can be clocked using either a single-ended or differential clock, and provisions are made on the EVM to allow users to evaluate the ADC using a single-ended PECL clock, or a differential transformer-coupled clock.
Digital output from the EVM is via a high-speed, high-density Samtec output header. The digital output connector mates directly to the TSW1200 Rev B or through an adapter to the TI ADSDeSer-50EVM, both of which de-serialize the serial data stream into parallel CMOS data.
Power connections to the EVM are via banana jack sockets. Separate sockets are provided for the ADC analog and ADC digital supplies and for the auxiliary circuits.
The design resource accessed as www.ti.com/lit/zip/slwc107 or www.ti.com/lit/xx/slwc107w/slwc107w.zip has been migrated to a new user experience at www.ti.com/tool/download/SLWC107. Please update any bookmarks accordingly.
| Type | Title | Date | ||
|---|---|---|---|---|
| Certificate | ADS5281EVM EU Declaration of Conformity (DoC) | 02 Jan 2019 | ||
| Application note | Understanding Serial LVDS Capture in High-Speed ADCs | 10 Jul 2013 |
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The design resource accessed as www.ti.com/lit/zip/slwc107 or www.ti.com/lit/xx/slwc107w/slwc107w.zip has been migrated to a new user experience at www.ti.com/tool/download/SLWC107. Please update any bookmarks accordingly.