The CDCLVC1112 is a high-performance, low additive phase noise LVCMOS clock buffer. It has one LVCMOS input and twelve LVCMOS outputs. It has also an enable pin. This evaluation module (EVM) is designed to demonstrate the electrical performance of the CDCLVC1112. However, this EVM can also be used for customers interested in evaluating the performance of the CDCLVC1106, CDCLVC1108 or CDCLVC1110 as well. For optimum performance, the board is equipped with 50-ohm SMA connectors and well controlled 50-ohm impedance microstrip transmission lines.
| Type | Title | Date | ||
|---|---|---|---|---|
| Certificate | CDCLVC1112EVM EU Declaration of Conformity (DoC) | 02 Jan 2019 | ||
| User guide | Low Additive Phase Noise LVCMOS Clock Buffer Eval Board | 07 Jul 2010 |
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