ADS54J54 Quad Channel 14-Bit 500 MSPS ADC

1 Features

4 Channel, 14-Bit 500 MSPS ADC
Analog input buffer with high impedance input
Flexible input clock buffer with divide by 1/2/4
1.25 V_PP Differential full-scale input
JESD204B Serial interface
- Subclass 1 compliant up to 5 Gbps
- 1 Lane Per ADC up to 250 Msps
- 2 Lanes Per ADC up to 500 Msps
64-Pin QFN Package (9 mm x 9 mm)
Key specifications:
- Power dissipation: 875 mW/ch
- Input bandwidth (3 dB): 900 MHz
- Aperture jitter: 98 fs rms
- Channel isolation: 85 dB
- Performance at ƒ_in = 170 MHz at 1.25 V_PP,
  1lane 2x Decimation –1 dBFS
  - SNR: 67.2 dBFS
  - SFDR: 85 dBc HD2,3; 95 dBFS non-HD2,3
- Performance at ƒ_in = 370 MHz at 1.25 V_PP,
  2lane no Decimation –1 dBFS
  - SNR: 64.7 dBFS
  - SFDR: 75 dBc HD2,3; 83 dBFS non-HD2,3