SCES803A April   2010  – June 2015 SN74AUP1T17

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Switching Characteristics, VCC = 2.5 V and VI = 1.8 V
    7. 6.7  Switching Characteristics, VCC = 2.5 V and VI = 2.5 V
    8. 6.8  Switching Characteristics, VCC = 2.5 V and VI = 3.3 V
    9. 6.9  Switching Characteristics, VCC = 3.3 V and VI = 1.8 V
    10. 6.10 Switching Characteristics, VCC = 3.3 V and VI = 2.5 V
    11. 6.11 Switching Characteristics, VCC = 3.3 V and VI = 3.3 V
    12. 6.12 Operating Characteristics
    13. 6.13 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

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1 Features

  • Single-Supply Voltage Translator
  • Output Level Up to Supply VCC CMOS Level
    • 1.8 V to 3.3 V (at VCC = 3.3 V)
    • 2.5 V to 3.3 V (at VCC = 3.3 V)
    • 1.8 V to 2.5 V (at VCC = 2.5 V)
    • 3.3 V to 2.5 V (at VCC = 2.5 V
  • Schmitt-Trigger Inputs Reject Input Noise and Provide Better Output Signal Integrity
  • Ioff Supports Partial Power Down (VCC = 0 V)
  • Very Low Static Power Consumption:
    0.1 µA
  • Very Low Dynamic Power Consumption:
    0.9 µA
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • Pb-Free Packages Available: SC-70 (DCK)
    2 x 2.1 x 0.65 mm (Height 1.1 mm)
  • More Gate Options Available at www.ti.com/littlelogic
  • ESD Performance Tested Per JESD 22
    • 2000-V Human Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)

2 Applications

  • AV Receivers
  • Audio Dock: Portable
  • Blu-ray Players and Home Theaters
  • MP3 Players and Recorders
  • Personal Digital Assistant (PDA)
  • Power: Telecom/Server AC/DC Supply: Single Controller: Analog and Digital
  • Solid State Drive (SSD): Client and Enterprise
  • TV: LCD/Digital and High-Definition (HDTV)
  • Tablet: Enterprise
  • Video Analytics: Servers
  • Wireless Headsets, Keyboards, and Mice

3 Description

The SN74AUP1T17 performs the Boolean function
Y = A with designation for logic-level translation applications with output referenced to supply VCC.

AUP technology is the industry's lowest-power logic technology designed for use in extending battery-life in operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCC supply. This product also maintains excellent signal integrity (see Figure 4 and Figure 1).

The wide VCC range of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external controllers or processors.

Schmitt-trigger inputs (ΔVT = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog mixed-mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and allow for slow input signal transition.

Ioff is a feature that allows for powered-down conditions (VCC = 0 V) and is important in portable and mobile applications. When VCC = 0 V, signals in the range from 0 V to 3.6 V can be applied to the inputs and outputs of the device. No damage occurs to the device under these conditions.

The SN74AUP1T17 is designed with optimized current-drive capability of 4 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
SN74AUP1T17DCK SC70 (5) 2.00 mm x 1.25 mm
  1. For all available packages, see the orderable addendum at the end of the data sheet.

Simplified Schematic

SN74AUP1T17 ld_ces351.gif

4 Revision History

Changes from * Revision (April 2010) to A Revision

  • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go