次のような機器のLED照明、インジケータ・ライト、および装飾用ライト
LP5569デバイスはプログラム可能で使いやすい9チャネルのI2C LEDドライバで、各種のアプリケーションで照明効果を生み出すよう設計されています。LEDドライバには、ユーザーによりプログラムされたシーケンスを格納するSRAMメモリと、3つのプログラム可能なLEDエンジンが搭載されており、プロセッサの制御なしで動作可能です。自律的な動作により、プロセッサがスリープ・モードのときシステムの消費電力が削減されます。
高効率のチャージ・ポンプにより、2.5Vの入力電圧でも高いVFのLEDを駆動できます。LP5569 LEDドライバは、LEDの順方向電圧要件に基づいて最良のチャージ・ポンプのゲインを自律的に選択し、広い動作電圧範囲にわたって良好な効率を維持します。
LEDがアクティブでないとき、LP5569はパワーセーブ・モードへ移行し、アイドル消費電流を大幅に削減します。柔軟なデジタル・インターフェイスにより、同じシステム内で各デバイスに固有のI2Cスレーブ・アドレスを使用して、最大8つのLP5569デバイスを接続でき、すべてのデバイス間で照明効果を同期できます。
型番 | パッケージ | 本体サイズ(公称) |
---|---|---|
LP5569 | WQFN (24) | 4.00mm×4.00mm |
PART NUMBER | GROUP | I2C SLAVE ADDRESS | ||
---|---|---|---|---|
LP5569 | 0 | 32h–35h and 40h (see I2C Slave Addressing) | ||
LP5569A | 1 | 42h–45h and 40h (see I2C Slave Addressing) |
PIN | TYPE(1) | DESCRIPTION | |
---|---|---|---|
NAME | NO. | ||
ADDR | 20 | I | I2C slave-address selection pin. See I2C Slave Addressing for more details. This pin must not be left floating. |
AGND | 4 | G | Analog and digital ground. Connect to PGND, exposed thermal pad, and common ground plane. |
C1– | 24 | A | Negative pin of charge-pump flying capacitor 1. If charge pump is not used, this pin must be left floating. |
C1+ | 2 | A | Positive pin of charge-pump flying capacitor 1. If charge pump is not used, this pin must be left floating. |
C2– | 23 | A | Negative pin of charge-pump flying capacitor 2. If charge pump is not used, this pin must be left floating. |
C2+ | 1 | A | Positive pin of charge-pump flying capacitor 2. If charge pump is not used, this pin must be left floating. |
CLK | 6 | I, OD | Clock input/output. By default this pin is a clock input. If not used, this pin must be connected to GND or VIN. |
EN/PWM | 5 | I | Chip enable and PWM input pin. |
GPIO/TRIG/INT | 7 | I, OD | General-purpose input or open-drain output, or trigger input or open-drain output, or interrupt open-drain output. This pin function is configured in the I2C registers. By default this pin is a general-purpose output (open-drain) and can be left floating if not used. |
LED0 | 19 | A | LED current sink 0. If not used, this pin can be left floating. |
LED1 | 18 | A | LED current sink 1. If not used, this pin can be left floating. |
LED2 | 17 | A | LED current sink 2. If not used, this pin can be left floating. |
LED3 | 16 | A | LED current sink 3. If not used, this pin can be left floating. |
LED4 | 15 | A | LED current sink 4. If not used, this pin can be left floating. |
LED5 | 14 | A | LED current sink 5. If not used, this pin can be left floating. |
LED6 | 13 | A | LED current sink 6. If not used, this pin can be left floating. |
LED7 | 12 | A | LED current sink 7. If not used, this pin can be left floating. |
LED8 | 11 | A | LED current sink 8. If not used, this pin can be left floating. |
PGND | 21 | G | Charge-pump power ground. Connect to AGND, exposed thermal pad, and common ground plane. |
SCL | 9 | I | I2C bus clock line. If not used, this pin must be connected to GND or VIN. |
SDA | 8 | I, OD | I2C bus data line. If not used, this pin must be connected to GND or VIN. |
V1P8 | 10 | P | Input power for digital circuitry. |
VIN | 3 | P | Input power, a 1-µF capacitor must be connected between PGND and this pin. |
VOUT | 22 | A | Charge-pump output voltage. If charge pump is used, a 1-µF capacitor must be connected between PGND and this pin. If charge pump is not used or is used in 1× mode only, the capacitor can be omitted. |
Exposed thermal pad | — | — | Must be connected to AGND (pin 4), PGND (pin 21), and common ground plane. See Layout Example. Must be soldered to achieve appropriate power dissipation and mechanical reliability. |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Voltage on VIN, CLK, ADDR, EN/PWM, GPIO/TRIG/INT, SCL, SDA, VOUT(2) | –0.3 | 6 | V | |
Voltage on LED0 to LED8, C1–, C2–, C1+, C2+ | −0.3 | VVIN + 0.3 V with 6 V max. | V | |
Voltage on V1P8 | −0.3 | 2 | V | |
Continuous power dissipation | Internally limited | Internally limited | ||
Junction temperature, TJ-MAX | –40 | 125 | °C | |
Storage temperature, Tstg | −65 | 150 | °C |
VALUE | UNIT | |||
---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) | ±2500 | V |
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) | ±250 |
MIN | MAX | UNIT | ||
---|---|---|---|---|
Input voltage on VIN | 2.5 | 5.5 | V | |
Voltage on LED0 to LED8, C1–, C2–, C1+, C2+, VOUT | 0 | VVIN | V | |
Voltage on CLK, ADDR, EN/PWM, GPIO/TRIG/INT, SDA, SCL | 0 | VVIN | V | |
Input voltage on V1P8 | 1.65 | 1.95 | V | |
Output current on VOUT | 0 | 160 | mA | |
Operating ambient temperature, TA (1) | −40 | 85 | °C |
THERMAL METRIC(1) | LP5569 | UNIT | |
---|---|---|---|
RTW (WQFN) | |||
24 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 35.8 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 26.7 | °C/W |
RθJB | Junction-to-board thermal resistance | 13.1 | °C/W |
ψJT | Junction-to-top characterization parameter | 0.4 | °C/W |
ψJB | Junction-to-board characterization parameter | 13.1 | °C/W |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 4.6 | °C/W |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
IVIN | Standby supply current | VEN/PWM = 0 V, chip_en (bit) = 0 | 0.2 | 1 | µA | |
VEN/PWM = 3.3 V, chip_en (bit) = 0, external CLK not running | 1 | 2 | ||||
VEN/PWM = 3.3 V, chip_en (bit) = 0, external CLK running | 2 | 4 | ||||
Normal-mode supply current | External CLK running, charge pump and current sinks disabled | 56 | 70 | µA | ||
Charge pump in 1× mode, no load, current sinks disabled | 65 | 90 | ||||
Charge pump in 1.5× mode, no load, current-sink outputs disabled | 1.8 | mA | ||||
Power-save mode supply current | External CLK running, see Automatic Power-Save Mode | 10 | 15 | µA | ||
Internal oscillator running | 10 | 15 | ||||
IV1P8 | Standby supply current | VEN/PWM = 0 V, chip_en(bit) = 0 | 0.2 | 1 | µA | |
VEN/PWM = 3.3 V, chip_en (bit) = 0, external CLK not running | 0.2 | 2 | µA | |||
VEN/PWM = 3.3 V, chip_en (bit) = 0, external CLK running | 1 | 4 | µA | |||
Normal-mode supply current | External CLK running, charge pump and current sinks disabled | 174 | 190 | µA | ||
Charge pump in 1× mode, no load, current sinks disabled | 174 | 190 | µA | |||
Charge pump in 1.5× mode, no load, current-sink- outputs disabled | 180 | µA | ||||
Powersave-mode supply current | External CLK running | 1 | 5 | µA | ||
Internal oscillator running | 1 | 5 | µA | |||
ƒOSC | 32-kHz internal oscillator frequency accuracy | TA = 25°C | –10% | 10% | ||
10-MHz internal oscillator frequency accuracy | –7% | 7% | ||||
VUVLO | Undervoltage lockout | VVIN falling | 2.2 | V | ||
VVIN rising | 2.3 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
ROUT | Charge-pump output resistance | Gain = 1×, VVIN = 4.2 V | 1 | Ω | ||
Gain = 1.5×, VVIN = 3.7 V | 3.5 | |||||
VOUT | VVIN = 3.7 V, IOUT = 160 mA, gain = 1.5× | 4.41 | 4.5 | 4.59 | V | |
ƒSW | Switching frequency | 1.25 | MHz | |||
ICL | Output current limit | VOUT = 0 V, VVIN = 3.7 V, CP_CONFIG = 0xFF | 600 | mA | ||
tON | VOUT turnon time | IOUT = 0 mA, VIN ≥ 3 V, VOUT > 4.1 V, gain = 1.5× | 100 | µs | ||
IOUT | Maximum output current | VVIN > 3.1 V, VOUT dropped 10%, gain = 1.5× | 200 | mA | ||
VIN > 2.5 V, VOUT dropped 10%, gain = 1.5× | 150 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
ILEAKAGE | Leakage current (LED0 to LED8) | PWM = 0%, VLED = 5 V | 1 | µA | ||
IMAX | Maximum sink current | 24.5 | 25.5 | 26.5 | mA | |
ILED_ACC | Sink current accuracy(1) | Current set to 17.5 mA. PWM = 100% | –4.5% | 4.5% | ||
ILED_MATCH | Matching(1) | Current set to 17.5 mA | 1% | 2.5% | ||
ƒLED | LED switching frequency | 19.5 | kHz | |||
VSAT | Saturation voltage(2) | Output current set to 25.5 mA | 90 | 110 | mV |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
LOGIC INPUT (EN/PWM, SCL, ADDR) | ||||||
VIL | Input low level | 0.4 | V | |||
VIH | Input high level | 1.25 | V | |||
Ilkg | Input leakage current | VI ≤ VVIN | –1 | 1 | µA | |
LOGIC OUTPUT (SDA, GPIO/TRIG/INT, CLK) | ||||||
VIL | Input low level | Pin configured as input | 0.4 | V | ||
VIH | Input high level | Pin configured as input | 1.25 | V | ||
Ilkg | Input leakage current | Pin configured as input, VVIN = 5.5 V, VI ≤ VVIN | –1 | 1 | µA | |
VOL | Output low level | IPULLUP = 3 mA | 0.2 | 0.5 | V | |
IL | Output leakage current | Pin configured as output, Hi-Z state | 1 | µA |
MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|
tEN | Enable time, EN/PWM first rising edge until first I2C access | 2 | 3 | ms | |
tEN_TIMEOUT | EN timeout, EN/PWM = low time while in standby mode (enable function) | 15 | ms | ||
tPWM_TIMEOUT | PWM timeout, EN/PWM = low time while in normal mode (PWM function) | 15 | ms | ||
PWMres | Resolution for EN/PWM input when configured as PWM, fPWM =10 kHz | 10 | bits |
MIN | MAX | UNIT | ||
---|---|---|---|---|
ƒSCL | Clock frequency | 0 | 400 | kHz |
1 | Hold time (repeated) START condition | 0.6 | µs | |
2 | Clock low time | 1.3 | µs | |
3 | Clock high time | 600 | ns | |
4 | Setup time for a repeated START condition | 600 | ns | |
5 | Data hold time | 0 | ns | |
6 | Data setup time | 100 | ns | |
7 | Rise time of SDA and SCL | 20 + 0.1Cb | 300 | ns |
8 | Fall time of SDA and SCL | 15 + 0.1Cb | 300 | ns |
9 | Setup time for STOP condition | 600 | ns | |
10 | Bus-free time between a STOP and a START condition | 1.3 | µs | |
Cb | Capacitive load for each bus line | 10 | 200 | pF |
MIN | TYP | MAX | UNIT | |||
---|---|---|---|---|---|---|
ƒCLK | Clock frequency | 32.7 | kHz | |||
tCLKH | High time | 6 | µs | |||
tCLKL | Low time | 6 | µs | |||
tr | Clock rise time, 10% rising edge to 90% rising edge | 2 | µs | |||
tf | Clock fall time, 90% falling edge to 10% falling edge | 2 | µs |
ILEDx setting per channel = 17.5 mA |
ILEDx setting per channel = 17.5 mA |