Good quality sinusoidal waveforms are often required for test and measurement and audio applications, but generating them with accurate frequency, amplitude, and low harmonic distortion is more difficult than can be expected. Sinusoidal generator circuits broadly fall into two classes: continuous-time and discrete-time solutions. Continuous time circuits such as the Wien bridge or phase-shift oscillators are fundamentally simple, but often require challenging non-linear circuitry to stabilize amplitude, are difficult to tune electronically, and have poor frequency stability. Without feedback control of amplitude, total harmonic distortion below about 1% is difficult to achieve, and amplitude stability can still be problematic over temperature and unit-to-unit variation.

Discrete time circuits based on DACs are now common and can also synthesize non-sinusoidal waveforms. Driving these DACs usually requires substantial digital hardware such as programmable gate arrays or processors, along with the firmware to configure the DAC and clock waveform data through it. Depending on the DAC and reconstruction filter chosen, excellent performance can be achieved but at the expense of this complex digital logic.

In 1969, Tony Davies published an IEEE paper¹ documenting how to create sinusoids using a discrete-time approach from a Johnson counter³ and weighted resistors summing up to an output similar to a finite impulse response filter. Davies’ analysis is z-domain based; an approach now used for most modern digital signal processing problems. Referring to this earlier work, in 1976 Don Lancaster demonstrated² an implementation using 4000-series MSI logic for a simple generator having reasonably good results but with the potential for much better performance by further scaling up the circuit.

This approach is tailored specifically for sinusoids and requires only a simple Johnson counter and a symmetric array of weighted resistors (Figure 2-1) to create a stepped-sinusoid output akin to a discrete time DAC-based device. The stepped-sinusoid is easily filtered to remove residual harmonics for the final output, and frequency can be stepped very quickly. This approach solves the problems associated with continuous time circuits but without the need for substantial logic or programmable devices and their related firmware, or DACs. Using modern and economical MSI components such as the HCS logic series from Texas Instruments, sinusoids up through 10’s of MHz can be created. Frequency and amplitude stability are limited only by the precisions of the time base and reference voltage used, and Total Harmonic Distortion (THD) performance can be improved as needed by using a larger shift register or additional harmonic filtering to meet the applicable specifications. This paper re-examines this approach and provides additional guidance on how to choose the resistor network to optimize THD using the standard EIA component values available. Simulation is used to verify results.