Design Objective

Objective: Bias an LED using a programmable current source.

Design Description

This design uses a buffered voltage and current output smart digital-to-analog converter (DAC) such as the DAC530A2W or DAC532A3W (DAC53xAxW) to bias a light-emitting diode (LED). The current output DAC (IDAC) on the DAC53xAxW can source up to 300mA to bias high-current LEDs. The DAC53xAxW have a general-purpose input-output (GPIO) pin that can be used to switch the LEDs between two current values, or on and off. The voltage channel of the DAC53xAxW can be configured as a comparator to monitor the LED voltage (V_LED) for software-independent fault management. The output of the comparator can be connected to the DAC53xAxW GPIO pin to turn the IDAC off if V_LED is out of range. All register settings can be saved into the non-volatile memory (NVM) on the smart DAC, meaning that the device can be used without a processor, even after a power cycle. This circuit can be used in applications such as in-vitro diagnostics, endoscopes, and digital microscopes.

Design Notes

1. This application circuit uses both channels of theDAC530A2W.
2. The DAC53xAxW 10-Bit Three-Channel and Two-Channel Voltage-Output and Current-Output Smart DAC With I²C or SPI data sheet recommends using a 100nF decoupling capacitor for the VDD and PVDD pins, and a 1.5µF or greater bypass capacitor for the CAP pin. The CAP pin is connected to the internal LDO. Place these capacitors close to the device pins.
3. Connect the PV_DD and V_DD supplies with a low-impedance PCB trace close to the DAC530A2W supply pins.

4. The DAC530A2W IDAC channel can be configured for a 300mA or 220mA output range in the IOUT-GAIN field of the DAC-2-GAIN-CONFIG register. This application uses the 300mA range.

5. The nominal IDAC output current for this application is 250mA. Set the IDAC code in the DAC-2-DATA register. The IDAC code for a 250mA output is calculated by:
   $\mathrm{D}\mathrm{A}\mathrm{C}\_\mathrm{D}\mathrm{A}\mathrm{T}\mathrm{A}=\frac{\mathrm{I}\mathrm{O}\mathrm{U}\mathrm{T}}{\mathrm{G}\mathrm{A}\mathrm{I}\mathrm{N}\times 0.5241\mathrm{m}\mathrm{A}}\times 2^{10}=\frac{250\mathrm{m}\mathrm{A}}{\raisebox{1ex}{$2$}\!\left/ \!\raisebox{-1ex}{$3$}\right.\times 0.5241\mathrm{m}\mathrm{A}}\times 2^{10}=733\mathrm{d}$
6. The headroom voltage (V_HEADROOM) is calculated as the difference between P_VDD and the voltage of the IDAC pin, or V_LED in this circuit. The IDAC output cannot source the full-scale current output if V_HEADROOM is lower than the specified voltage. Minimize V_HEADROOM to reduce the power dissipation of the device while also meeting the minimum V_HEADROOM requirement. The IDAC output contributes to power dissipation proportionally to the output current multiplied by V_HEADROOM.
7. The voltage output (VOUT) channel of the DAC530A2W is used as a programmable comparator to sense an out-of-range condition of V_LED. The threshold (V_THRESH) for the comparator is set in the DAC-1-DATA register. The comparator can use V_DD as the reference, or the internal 1.21V reference with a configurable gain. In the DAC-1-GAIN-CMP-CONFIG register:
   1. Select the reference and gain for the comparator
   2. Enable the channel for comparator mode
   3. Enable the comparator output
   4. Disable Hi-Z input mode
8. Using the 3.3V V_DD as the voltage reference with a 1 × gain, the code for a 1V threshold is calculated by:
   $\mathrm{D}\mathrm{A}\mathrm{C}\_\mathrm{D}\mathrm{A}\mathrm{T}\mathrm{A}=\frac{{\mathrm{V}}_{\mathrm{T}\mathrm{H}\mathrm{R}\mathrm{E}\mathrm{S}\mathrm{H}}}{{\mathrm{V}}_{\mathrm{R}\mathrm{E}\mathrm{F}}\times \mathrm{G}\mathrm{A}\mathrm{I}\mathrm{N}}{\times 2}^{10}=\frac{1\mathrm{V}}{3.3\mathrm{V}}{\times 2}^{10}=310\mathrm{d}$
9. The IDAC uses the internal reference. Enable the internal reference, IDAC output, and comparator channel in the COMMON-CONFIG register
10. In this application circuit, the comparator output is connected to the GPIO pin to clear the IDAC output to zero-scale. When V_LED is less than V_THRESH, the comparator output is high and the IDAC output remains at the programmed code in the DAC-2-DATA register. When V_LED is greater than V_THRESH, the comparator output is set low and the IDAC output is cleared to zero-scale. This is the default configuration of the comparator. To reverse the comparator output polarity, set the CMP-1-INV-EN bit in the DAC-1-GAIN-CMP-CONFIG register to 1.
11. The GPI-EN bit in the GPIO-CONFIG register enables the GPIO pin as an input. The GPI-CH-SEL field selects which channels are controlled by the GPI. The GPI-CONFIG field selects the GPI function. Write 0b0111 to the GPI-CONFIG field to configure the GPIO pin to trigger the clear function.
12. The DAC530A2W can be programmed with the initial register settings described in the Register Settings section using I²C or SPI. Save the initial register settings in the NVM by writing a 1 to the NVM-PROG field of the COMMON-TRIGGER register. After programming the NVM, the device loads all registers with the values stored in the NVM after a reset or a power cycle.

Design Results

This schematic is used for the following design results of the DAC530A2W. V_LED and I_LED are measured at the test points marked on the schematic.

Register Settings

The following table shows an example register map for this application. The values given here are for the design choices made in the Design Notes section.

Pseudocode Example

The following shows a pseudocode sequence to program the initial register values to the NVM of the DAC530A2W. The values given here are for the design choices made in the Design Notes section.

Pseudocode Example for DAC530A2W

//SYNTAX: WRITE <REGISTER NAME (Hex Code)>, <MSB DATA>, <LSB DATA>  
//Set IDAC gain setting to 2/3 
WRITE DAC-2-GAIN-CONFIG(0x03), 0x00, 0x00 
//Write DAC code for nominal IDAC output 
//The 10-bit hex code for 250mA is 0x2DD. With 16-bit left alignment, this becomes 0xB740 
WRITE DAC-2-DATA(0x19), 0x57, 0x40 
//Set VOUT1 gain setting to 1× VDD (3.3V), enable comparator mode, enable comparator output, disable Hi-z input 
WRITE DAC-1-GAIN-CMP-CONFIG(0x15), 0x04, 0x0D 
//For a 3.3V output range, the 10bit hex code for 1V is 0x136. With 16-bit left alignment, this becomes 0x4D80 
WRITE DAC-1-DATA(0x1C), 0x4D, 0x80 
//Power-up output on IDAC and VDAC channels, enables internal reference 
WRITE COMMON-CONFIG(0x1F), 0x13, 0xF9 
//Configure GPI for clear trigger for IDAC channel 
WRITE GPIO-CONFIG(0x24), 0x00, 0x2F 
//Save settings to NVM 
WRITE COMMON-TRIGGER(0x20), 0x00, 0x02

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Design References

See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.

Additional Resources

• Texas Instruments, Smart DAC Python Examples
• Texas Instruments, AFE532A3WEVM-Evaluation Module
• Texas Instruments, AFE532A3WEVM User’s Guide
• Texas Instruments, Precision Labs - DACs

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