SNOU191 January 2022 LM74502-Q1 , LM74502H-Q1
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TI's LM74502-Q1 Evaluation module, LM74502Q1EVM, is a two-channel EVM that helps designers evaluate the operation and performance of the LM74502-Q1 in channel 1 and LM74502H-Q1 in channel 2 respectively. This evaluation module demonstrates how LM74502-Q1 drives external back-to-back connected N-channel MOSFETs to realize reverse polarity protection and load disconnect feature in case of overvoltage and undervoltage events. LM74502-Q1 has a gate drive strength of 60 μA, which makes it suitable for use in applications that need inherent inrush current control. On the other hand, LM74502H-Q1 has a faster gate drive of 11-mA peak, which makes it suitable for applications which need fast turn-on and turn-off of external MOSFET switch. With the enable pin low during the standby mode, both the external MOSFETs and controller is off and draws a very low 1 μA of current.
Key features of the EVM include:
The LM74502-Q1EVM is configured by default for evaluating 12-V and 24-V reverse polarity protection through external back-to-back FET control, with additional abilities to configure and evaluate LM74502H-Q1 as a load switch and LM74502-Q1 as a surge stopper/transient suppressor. Also, the module enables the user to adjust and evaluate overvoltage cutoff, clamp protection and output voltage slew rate control.
Input power is applied at the terminals J1 and J5 for channel 1 and J7 and J11 for channel 2. Terminals J2 and J6, J8 and J12 provide output connection to load for channel 1 and channel 2 respectively.
Channel 1 on the LM74502-Q1EVM is populated with one set of back-to-back connected N-channel MOSFETs (Q3 and Q4 in channel 1) capable to support 5-A applications. Placeholders for parallel FETs (Q1 and Q2 in channel 1) and are provided for extending current to 10 A and can be used to validate other MOSFETs. To enable the user to evaluate load switch functionality, one FET (Q8) is populated on channel 2.
Table 2-1 lists the LM74502Q1EVM board input and output connector functionality. Table 2-2 and Table 2-3 describe the test points description and the jumper functionality of the EVM respectively.
Channel | Connector | Description |
---|---|---|
1 | J1 | Power input connector to the positive rail of the input power supply |
J5 | Ground connection for the power supply | |
J2 | Power output connector to the positive side of the load | |
J6 | Ground connection for the load | |
2 | J7 | Power input connector to the positive rail of the input power supply |
J11 | Ground connection for the power supply | |
J8 | Power output connector to the positive side of the load | |
J12 | Ground connection for the load |
Test Point | Name | Description |
---|---|---|
TP1 | VIN1 | Input power supply to the EVM - channel 1 |
TP2 | VOUT1 | Output from the EVM - channel 1 |
TP5 |
GATE1 | Output of controller’s gate pin – channel 1 |
TP6 | OV1 | Adjustable input at the overvoltage pin – channel 1 |
TP7 |
VS1 | Power supply to the controller – channel 1 |
TP8 |
EN/UVLO1 |
EN/UVLO input to the controller – channel 1 |
TP9 |
VIN2 |
Input power supply to the EVM - channel 2 |
TP10 | VOUT2 | Output from the EVM - channel 2 |
TP14 | OV2 | Adjustable input at the overvoltage pin – channel 2 |
TP15 | VS2 | Power supply to the controller – channel 2 |
TP16 | EN/UVLO2 | EN/UVLO input to the controller – channel 2 |
TP3,TP4,TP11,TP12 |
PGND | Test point for EVM ground |
Jumpers | Description |
---|---|
J4 |
OV protection setting channel 1
|
J3 | Enables LED indication for output – channel 1 |
J10 |
OV protection setting channel 2
|
J9 | Enables LED indication for output – channel 2 |