DATA SHEET
TSC2013-Q1 12-Bit, Nanopower, 4-Wire Dual-Touch Screen Controller With I2C Interface
1 Features
- Qualified for Automotive Applications
- AEC-Q100 Qualified With the Following Results:
- Device Temperature Grade 1: –40°C to 125°C
- Device HBM ESD Classification Level 2
- Device CDM ESD Classification Level C4B
- 4-Wire Touch Screen Interface
- Ratiometric Conversion
- Single 1.6-V to 3.6-V Supply:
- I/OVDD 1.2 to 3.6 V
- SNSVDD: 1.6 to 3.6 V
- Preprocessing to Reduce Bus Activity
- High-Speed I2C-Compatible Interface
- Internal Detection of Screen Touch
- Register-Based Programmable:
- 10-Bit or 12-Bit Resolution
- Sampling Rates
- System Timing
- Touch Pressure Measurement
- Auto Power-Down Control
- Low Power:
- 430 μA at 1.8 V, 50 SSPS
- 320 μA at 1.6 V, 50 SSPS
- 58 μA at 1.6 V, 8.2 kSPS Eq. Rate
2 Applications
- Automotive Infotainment Display
- Automotive Navigation System
- Industrial User Interfaces
- Medical Devices
- Portable Consumer Electronics
3 Description
The TSC2013-Q1 device is a very low-power dual-touch screen controller designed to work with power-sensitive, low-cost touch-screen displays in automotive infotainment and navigation systems. It contains a complete, ultralow-power, 12-bit, analog-to-digital (ADC) resistive touch-screen converter, including drivers and the control logic to measure touch pressure.
The TSC2013-Q1 device enables pinch, rotate, and zoom functionality over a standard four-wire interface. The device supports an I2C serial bus and data transmission protocol in all three defined modes: standard, fast, and high-speed. The 10 or 12-bit ADC within is easily programmable to customize system and user experience.
Device Information(1)
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| TSC2013-Q1 | PVQFN (16) | 4.00 mm × 4.00 mm |
| TSSOP (16) | 4.40 mm × 5.00 mm |
(1) For all available packages, see the orderable addendum at the end of the datasheet.
Block Diagram
5 Pin Configurations and Functions
16-Pin VQFN With Thermal Pad
RSA Package
Top View
16-Pin TSSOP
PW Package
Top View
Pin Functions
| PIN | I/O | ADC | DESCRIPTION | ||
|---|---|---|---|---|---|
| NAME | RSA | PW | |||
| AD0 | 16 | 1 | I | D | I2C bus TSC address input bit 0 |
| AD1 | 3 | 4 | I | D | I2C bus TSC address input bit 1 |
| AGND | 9 | 10 | — | — | Analog, digital, and ESD ground(1) |
| AUX | 8 | 9 | — | A | Auxiliary channel |
| DGND | 6 | 7 | — | — | No internal connection. Connect this pin to analog ground for mechanical stability. |
| I/OVDD | 7 | 8 | I | — | Digital interface voltage |
| PINTDAV | 4 | 5 | O | D | Interrupt output. Data available or the pen-detect interrupt (PENIRQ), depending on setting. Pin polarity is active-low. |
| RESET | 5 | 6 | I | D | External hardware reset input (active-low). |
| SDA | 1 | 2 | I/O | D | Serial data I/O |
| SCL | 2 | 3 | I | D | Serial clock |
| SNSGND | 15 | 16 | — | — | Sensor driver return |
| SNSVDD/VREF | 10 | 11 | I | — | Power supply for sensor drivers and other analog blocks |
| X+ | 11 | 12 | — | A | X+ channel |
| X– | 13 | 14 | — | A | X– channel |
| Y+ | 12 | 13 | — | A | Y+ channel |
| Y– | 14 | 15 | — | A | Y– channel |
(1) For optimized system IEC ESD performance, contact Texas Instruments for schematic and layout reviews and suggestions.