A lookup table (LUT) is a programmable way to perform digital logic functionality. One way to think about a LUT is as a fill in the blank truth table. For example Table 1-1 is a blank 3 input LUT. This looks very similar to every 3 input truth table, but the outputs are defined by the user instead of a predefined function.

In discrete logic, if the desired function is Equation 1, a simple discrete logic design is to use a 3 input AND gate with a NOT gate on the A input. With a LUT, completing this functionality is simply to set REG 6 to 1 (logic high) and the rest to 0 (logic low) as shown in Table 1-2

Implementing LUTs allows for more flexibility in the design, and using programmable logic, such as the TPLD1201, allows designers to make quick changes to logic functionality without any changes to the board or material list.

For many familiar with discrete logic, the logic becomes easier to think of the LUT as if there was a multiplex (MUX).

As shown in Figure 2-1 the inputs are more like select pins than actual inputs into logic gates. When A and B are both low Reg 0 is present at the output. When A is high and B is low Reg 1 is present at the output. When A is low and B is high Reg 2 is present at the output. When A and B are both high Reg 3 is present at the output . This means the user is not altering paths within the programmable logic when setting the LUT, but instead changing the value being pushed through by the MUX at any one time

InterConnect Studio (ICS) is the software used to configure a TPLD. Once ICS is launched and a device is selected. Figure 3-1 shows the default configuration of a LUT when the LUT is added to a design. The name field can be set to any value using alpha numeric characters. This value then is always present just below the block in the design space. The label field is a multiline version of the name field. The value entered there is always present in the design space above the block. More information on these fields can be found in ICS User Guide. To change the amount of inputs available select the inputs drop down and select the desired number. A higher input hardware LUT can be allocated to a lower input count LUT in InterConnect Studio. For example when using a 2 input LUT in the design a 3 input LUT can be allocated. In this instance the extra input is tied to ground internally and the equation/table calculator automatically accounts for that input being 0 constantly.

The ways to configure the LUT are

• Using a predefined logic function. Those options are
  • AND
  • OR
  • XOR
  • NAND
  • NOR
  • XNOR
  • INVA
• Using a table as shown in Figure 3-3
• Writing an equation as shown in Figure 3-4. For more information on allowed characters please see ICS User Guide.

These options can be selected from the Boolean function field as shown in Figure 3-2

Figure 4-1 is an example of a bus arbitration logic. The purpose of this logic is to determine which controller has priority on the bus at any given time. If both RX are low the buses are being held high. Each color box represents a different physical device. Table 4-1 shows the total area of this design upon discrete implementation without even accounting for tolerances between devices or traces needed to interconnect the devices.

By looking at the inputs to certain groupings of logic gates we can separate this design into 4 groups. Each one of these groups can be simplified down into a single LUT as shown in Figure 4-2.

Now that the schematic has been separated as such we can bring this design into ICS we can create a configuration with 4 pins and 4 LUTs to complete this schematic as shown in Figure 4-3.The configuration of lut1 is 2 input with the table shown in Table 4-2. The configuration of lut2 and lut3 are 3 input with the table shown in Table 4-4. the configuration of lut4 is 2 input with the table shown in Table 4-3.

The Lookup Table is a great, flexible way to incorporate logic needed for a system. Utilizing the LUTs available in the TPLD family means changes to logic can be quick without requiring board changes. Using InterConnect Studio makes configuring a LUT easy, and can condense discrete logic designs into one device.

More information for the TPLD family of devices can be found at Programmable Array Logic Circuits for Military Applications, and refer to Table 5-1 for some available devices and evaluation modules to prototype.

• Texas Instruments, ICS User Guide.