DC/DC converter loop response tests are common in IC development phase as well as in system development phase. Loop response reflects DC/DC converters stable performance. Tuning loop compensation parameters or external components is needed to make sure a desired performance. Using correlated simulation model and bench would significantly shorten optimization time.
This application note introduces the bench and simulation methods of measuring loop response, explains why need to do bench and simulation correlation, and provides how to extract raw data from bench and simulation results to correlate loop response for DC/DC converters both in time domain and frequency domain.
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Loop response performance is critical for the proper operation in a DC/DC converter system. During a new IC product design phase or an end equipment evaluation phase, loop response bench test and simulation results could be the good reference to improve converter loop response and stability. The most common methods of measuring loop response are load transient in time domain and bode plot test in frequency domain.
In bench test time domain, load transient performance can be measured by oscilloscope to reflect loop response. During the load transient, the output voltage overshoot and undershoot can be observed. Based on the amount of overshoot, undershoot and ringing occurring during the load transient, the converter loop response phase margin and crossover frequency can be estimated (see: Evaluation and Performance Optimization of Fully Integrated DC/DC Converters, as shown in Figure 1-1.
In bench test frequency domain, bode plot can be measured by using a network analyzer or a specific loop gain measurement instrument as available from AP Instruments to judge the loop response. The gain and phase are plotted against the frequency. Phase margin and crossover frequency can be directly obtained.
In simulation, load transient in time domain can be simulated both in Simplis and Candence. Bode plot in frequency domain can be simulated using Simplis. The common methods of loop response test can be summarized as shown Figure 1-2.
Loop response reflects DC/DC converters stable performance. In IC development phase, IC designers need to look into the simulation results and actual bench test results, correlate the DC/DC device model, to make the model better and more close to silicon. As well as during system evaluating and debugging phase, engineers can use correlated simulation to guide bench test which will be more effective. To get a correlated model, extracting raw data from bench and simulation into one format (for example, CSV file) to compare difference is the first step. This application note introduces how to extract raw data of DC/DC converter loop response bench and simulation tests.