SNVSA05A
December 2019 – August 2021
LP875701-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
I2C Serial Bus Timing Requirements
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Descriptions
7.3.1
Multi-Phase DC/DC Converters
7.3.1.1
Overview
7.3.1.2
Multiphase Switcher Configurations
7.3.1.3
Buck Converter Load-Current Measurement
7.3.1.4
Spread-Spectrum Mode
7.3.2
Sync Clock Functionality
7.3.3
Power-Up
7.3.4
Regulator Control
7.3.4.1
Enabling and Disabling Regulators
7.3.5
Enable and Disable Sequences
7.3.6
Device Reset Scenarios
7.3.7
Diagnosis and Protection Features
7.3.7.1
Power-Good Information (PGOOD pin)
7.3.7.2
Warnings for Diagnosis (Interrupt)
7.3.7.2.1
Output Power Limit
7.3.7.2.2
Thermal Warning
7.3.7.3
Protection (Regulator Disable)
7.3.7.3.1
Short-Circuit and Overload Protection
7.3.7.3.2
Overvoltage Protection
7.3.7.3.3
Thermal Shutdown
7.3.7.4
Fault (Power Down)
7.3.7.4.1
Undervoltage Lockout
7.3.8
GPIO Signal Operation
7.3.9
Digital Signal Filtering
7.4
Device Functional Modes
7.4.1
Modes of Operation
7.5
Programming
7.5.1
I2C-Compatible Interface
7.5.1.1
Data Validity
7.5.1.2
Start and Stop Conditions
7.5.1.3
Transferring Data
7.5.1.4
I2C-Compatible Chip Address
7.5.1.5
Auto-Increment Feature
7.6
Register Maps
7.6.1
Register Descriptions
53
7.6.1.1
DEV_REV
7.6.1.2
OTP_REV
7.6.1.3
BUCK0_CTRL1
7.6.1.4
BUCK0_DELAY
7.6.1.5
GPIO2_DELAY
7.6.1.6
GPIO3_DELAY
7.6.1.7
RESET
7.6.1.8
CONFIG
7.6.1.9
INT_TOP1
7.6.1.10
INT_TOP2
7.6.1.11
INT_BUCK_0_1
7.6.1.12
INT_BUCK_2_3
7.6.1.13
TOP_STAT
7.6.1.14
BUCK_0_1_STAT
7.6.1.15
BUCK_2_3_STAT
7.6.1.16
TOP_MASK1
7.6.1.17
TOP_MASK2
7.6.1.18
BUCK_0_1_MASK
7.6.1.19
BUCK_2_3_MASK
7.6.1.20
SEL_I_LOAD
7.6.1.21
I_LOAD_2
7.6.1.22
I_LOAD_1
7.6.1.23
PGOOD_CTRL1
7.6.1.24
PGOOD_CTRL2
7.6.1.25
PGOOD_FLT
7.6.1.26
PLL_CTRL
7.6.1.27
PIN_FUNCTION
7.6.1.28
GPIO_CONFIG
7.6.1.29
GPIO_IN
7.6.1.30
GPIO_OUT
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.1.1
Inductor Selection
8.2.1.2
Input Capacitor Selection
8.2.1.3
Output Capacitor Selection
8.2.1.4
Snubber Components
8.2.1.5
Supply Filtering Components
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Receiving Notification of Documentation Updates
11.2
Support Resources
11.3
Trademarks
11.4
Electrostatic Discharge Caution
11.5
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RNF|26
MPQF469A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
snvsa05a_oa
snvsa05a_pm
1
Features
Qualified for Automotive Applications
AEC-Q100 Qualified With the Following Results:
Device Temperature Grade 1: –40°C to +125°C Ambient Operating Temperature
Device HBM ESD Classification Level 2
Device CDM ESD Classification Level C4B
Input Voltage: 2.8 V to 5.5 V
Output Voltage: 1.0 V
Four High-Efficiency Step-Down DC/DC Converter Cores:
Maximum Output Current:
10 A (2.5 A per Phase)
Switching Frequency: 3 MHz
Spread-Spectrum Mode and Phase Interleaving
Configurable General Purpose I/O (GPIOs)
I
2
C-Compatible Interface That Supports Standard (100 kHz), Fast (400 kHz), Fast+ (1 MHz), and High-Speed (3.4 MHz) Modes
Interrupt Function With Programmable Masking
Programmable Power-Good Signal (PGOOD)
Output Short-Circuit and Overload Protection
Overtemperature Warning and Protection
Overvoltage Protection (OVP) and Undervoltage Lockout (UVLO)