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SN54SC8T373-SEP Radiation Tolerant Octal Transparent D-Type Latches with 3-State Outputs
SCASE63
January 2025
SN54SC8T373-SEP
PRODUCTION DATA
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SN54SC8T373-SEP Radiation Tolerant Octal Transparent D-Type Latches with 3-State Outputs
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics
5.7
Timing Characteristics
5.8
Typical Characteristics
6
Parameter Measurement Information
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Balanced CMOS 3-State Outputs
7.3.2
SCxT Enhanced Input Voltage
7.3.2.1
Up Translation
7.3.2.2
Down Translation
7.3.3
Clamp Diode Structure
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.3
Design Requirements
8.3.1
Power Considerations
8.3.2
Input Considerations
8.3.3
Output Considerations
8.4
Detailed Design Procedure
8.5
Application Curves
8.6
Power Supply Recommendations
8.7
Layout
8.7.1
Layout Guidelines
8.7.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
Receiving Notification of Documentation Updates
9.3
Support Resources
9.4
Trademarks
9.5
Electrostatic Discharge Caution
9.6
Glossary
10
Revision History
11
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
PW|20
MPDS362A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
scase63_oa
scase63_pm
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Data Sheet
SN54SC8T373-SEP
Radiation Tolerant Octal Transparent D-Type Latches
with 3-State Outputs