SLVSCE4C
December 2013 – September 2024
UCC27532-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Description (continued)
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
VDD Undervoltage Lockout
7.3.2
Input Stage
7.3.3
Enable Function
7.3.4
Output Stage
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Applications
8.2.1
Driving IGBT Without Negative Bias
8.2.1.1
Design Requirements
8.2.1.2
Detailed Design Procedure
8.2.1.2.1
Input-to-Output Configuration
8.2.1.2.2
Input Threshold Type
8.2.1.2.3
VDD Bias Supply Voltage
8.2.1.2.4
Peak Source and Sink Currents
8.2.1.2.5
Enable and Disable Function
8.2.1.2.6
Propagation Delay
8.2.1.2.7
Power Dissipation
8.2.1.3
Application Curves
8.2.2
Driving IGBT With 13-V Negative Turnoff Bias
8.2.3
Using UCC27532-Q1 Drivers in an Inverter
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
10.3
Thermal Consideration
11
Device and Documentation Support
11.1
Third-Party Products Disclaimer
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Receiving Notification of Documentation Updates
11.4
Support Resources
11.5
Trademarks
11.6
Electrostatic Discharge Caution
11.7
Glossary
12
Revision History
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DBV|6
MPDS026Q
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsce4c_oa
slvsce4c_pm
Data Sheet
UCC27532-Q1 2.5A and 5A, 35V
MAX
VDD Fet and IGBT Single-Gate Driver