The ADS42JB46 is a high-linearity, dual-channel, 14-bit, 160-MSPS, analog-to-digital converter (ADC). This device supports the JESD204B serial interface with data rates up to 3.125 Gbps. The buffered analog input provides uniform input impedance across a wide frequency range while minimizing sample-and-hold glitch energy, thus making driving analog inputs up to very high input frequencies easy. A sampling clock divider allows more flexibility for system clock architecture design. The device employs internal dither algorithms to provide excellent spurious-free dynamic range (SFDR) over a large input frequency range.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | ADS42JB46 Dual-Channel, 14-Bit, 160-MSPS Analog-to-Digital Converter datasheet (Rev. B) | PDF | HTML | 02 Sep 2015 |
| Application note | Correcting the Low-Frequency Response of the ADS42LBxx, ADS42JBxx for Time-Domai | 02 May 2016 | ||
| User guide | TSW14J56 JESD204B High-Speed Data Capture/ Pattern Generator Card User's Guide (Rev. C) | PDF | HTML | 11 Jan 2016 | |
| White paper | Ready to make the jump to JESD204B? White Paper (Rev. B) | 19 Mar 2015 | ||
| User guide | Interoperability of TI ADS42JB69 Family of JESD204B ADCs with Altera FPGAs | 04 Oct 2013 |
For additional terms or required resources, click any title below to view the detail page where available.
The ADS42JB46EVM is an evaluation module (EVM) that allows for the evaluation of the ADS42JB46 and LMK04828 clock jitter cleaner. ADS42JB46 is a low-power, 14-bit, 160-MSPS analog-to-digital converter (ADC) with a buffered analog input and outputs featuring a JESD204B interface. The EVM has (...)
The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VQFN (RGC) | 64 | Ultra Librarian |
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Analog Engineer's Calc Installer
General calculator tool for analog design support.
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