Firmware
DAC38RF85
14-Bit, 9-GSPS, 6x-24x Interpolating, 6 & 9 GHz PLL Digital-to-Analog Converter (DAC)
Data sheet
DAC38RF85
- 14-bit resolution
- Maximum DAC sample rate: 9 GSPS
- Key Specifications:
- RF full-scale output power at 2.1 GHz:
- DAC38RF80/90/84: 0 dBm
- DAC38RF83/93/85: 3 dBm (with 2:1 balun)
- Spectral performance(on-chip PLL, DIFF):
- fDAC = 5898.24 MSPS, fOUT = 2.14 GHz
- WCDMA ACLR: 75 dBc
- WCDMA alt-ACLR: 77 dBc
- fDAC = 8847.36 MSPS, fOUT = 3.7 GHz
- 20 MHz LTE ACLR: 63 dBc
- fDAC = 9 GSPS, fOUT = 1.8 GHz
- IMD3 = 70 dBc (–6 dBFS, 10-MHz tone spacing)
- NSD = –157 dBc/Hz
- fDAC = 5898.24 MSPS, fOUT = 2.14 GHz
- RF full-scale output power at 2.1 GHz:
- Dual-band digital up-converter per DAC
- 6, 8, 10, 12, 16, 18, 20 or 24x interpolation
- 4 Independent NCOs with 48-bit resolution
- JESD204B Interface, subclass 1
- Support for multichip synchronization
- Maximum lane rate: 12.5 Gbps
- Single-ended output with integrated balun (DAC38RF80/90/84) covering 700 MHz to 3800 MHz
- Internal PLL and VCO with bypass
- fC(VCO) = 5.9 or 8.9 GHz
- Power dissipation: 1.4 to 2.2 W/ch
- Power supplies: –1.8 V, 1 V, 1.8 V
- Package: 10 x 10 mm BGA, 0.8 mm pitch, 144-balls
The DAC38RFxx is a family of high-performance, dual/single-channel, 14-bit, 9-GSPS, RF-sampling digital-to-analog converters (DACs) that are capable of synthesizing wideband signals from 0 to 4.5 GHz. A high dynamic range allows the DAC38RFxx family to generate signals for a wide range of applications including 3G/4G signals for wireless base-stations and radar.
The devices feature a low-power JESD204B Interface with up to 8 lanes with a maximum bit rate of 12.5 Gbps allowing an input data rate of 1.25 GSPS complex per channel. The DAC38RFxx provides two digital up-converters per channel, with multiple options for interpolation rates. A digital quadrature modulator with independent, frequency flexible NCOs are available to support multi-band operation. An optional low-jitter PLL/VCO simplifies the DAC sampling clock generation by allowing use of a lower frequency reference clock.
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Technical documentation
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View all 7 | Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | DAC38RFxx Dual- or Single-Channel, Single-Ended or Differential Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface and On-Chip PLL datasheet (Rev. D) | PDF | HTML | 28 Dec 2023 |
| Application note | Impact of Power-Supply Noise on Phase Noise Performance of RF DACs | 13 Jun 2018 | ||
| Application note | Eye Scan Testing with the DAC38RFxx | 10 Aug 2017 | ||
| Application note | Quick-Start Methods in Simulating the DAC38RF8x Input/Output Buffer Information | 02 Aug 2017 | ||
| Application note | DAC38RF8x Test Modes | 25 Jul 2017 | ||
| EVM User's guide | DAC38RF8xEVM User's Guide (Rev. A) | 24 Mar 2017 | ||
| Design guide | Efficient Power Supply Scheme for RF-Sampling DAC Reference Design | 22 Aug 2016 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
Evaluation board
DAC38RF82EVM — DAC38RF82 Dual-Channel, 14-Bit, 9-GSPS, 1x-24x Interpolating, 6 & 9 GHz PLL DAC Evaluation Module
The DAC38RF82EVM is the circuit board for evaluating DAC38RF82/83/85/93 digital to analog converters (DACs). The EVM can be used to evaluate the performance of the DAC up to 9GSPS sampling rate and it is designed to work with the TSW14J56 EVM. The available FMC connector also makes it possible to (...)
User guide: PDF
Firmware
TI204C-IP — Request for JESD204 rapid design IP
The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
Supported products & hardware
Products
High-speed DACs (>10 MSPS)
Transmitters
Receivers
High-speed ADCs (≥10 MSPS)
RF-sampling transceivers
GUI for evaluation module (EVM)
DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.20
This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)
Supported products & hardware
Products
High-speed DACs (>10 MSPS)
Transmitters
Receivers
High-speed ADCs (≥10 MSPS)
Ultrasound AFEs
RF-sampling transceivers
Hardware development
Evaluation board
Software
Support software
GUI for evaluation module (EVM)
SLAC722 — DAC38RF8x EVM GUI
Supported products & hardware
Products
High-speed DACs (>10 MSPS)
Transmitters
Hardware development
Evaluation board
Simulation tool
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Reference designs
TIDA-01215 — Power Supply Reference Design for Optimizing Spur and Phase Noise in RF-sampling DACs
This reference design provides an efficient power supply scheme to power-up the RF-sampling DAC38RF8x digital-to-analog data converter (DAC) without sacrificing performance and also reduces board area and BOM. The reference design uses both DC/DC switchers and an LDO to power-up the DAC38RF8x (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| FCCSP (AAV) | 144 | Ultra Librarian |
Ordering & quality
Information included:
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- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Information included:
- Fab location
- Assembly location
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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