Firmware
DAC38RF89
Dual-Channel, 14-Bit, 8.4-GSPS, 1x-24x Interpolating, 5 & 7.5 GHz PLL Digital-to-Analog Converter
Data sheet
DAC38RF89
- 14-Bit resolution, 9-GSPS DAC with multimode operation
- 16-Bit, Dual-channel data mode
- Max input rate: 2.5-GSPS
- Wideband digital up-converter
- Interpolation: 1,2,4,6,8,10,12,16,18,20,24x
- 12-Bit, Dual-channel data mode
- Max input rate: 3.33-GSPS
- Wideband digital Up-converter
- Interpolation: 1,2,24x
- 8-Bit, Single-channel data mode
- Max input rate: 9-GSPS
- 16-Bit, Dual-channel data mode
- JESD204B interface
- Subclass 1 for multichip synchronization
- DAC38RF89: Maximum lane rate: 12.5 Gbps
- DAC38RF82: Maximum lane rate: 12.8 Gbps
- Differential output
- Supports DC coupling
- RF Full-scale output power (with 2:1 balun):
3 dBm at 2.14 GHz
- Internal PLL and VCO with bypass
- DAC38RF82: fC(VCO) = 5.9 or 8.9 GHz
- DAC38RF89: fC(VCO) = 5 or 7.5 GHz
- Power supplies: -1.8 V, 1.0 V, 1.8 V
- Package: 10 x 10 mm BGA, 0.8 mm pitch,
144-balls
The DAC38RF82 and DAC38RF89 are high performance, wide bandwidth RF-sampling digital-to-analog (DACs) that are capable of dual channel input data rate up to 3.33 GSPS or single-channel operation with 8-bits up to 9-GSPS. The devices have a low power JESD204B Interface with up to 8 lanes, with a maximum bit rate of 12.5 Gbps (DAC38RF89) and 12.8 Gbps (DAC38RF82).
In dual channel operation, the input interface is capable of data rates up to 3.33 GSPS at 12-bits and 2.5 GSPS at 16-bits resolution without interpolation. When used as a complex baseband transmitter with interpolation modes from 2x to 24x, the DAC38RF82 or DAC38RF89 is capable of synthesizing wideband signals up to 2 GHz bandwidth with 16-bit input resolution and 2.66 GHz bandwidth with 12-bit input resolution.
The 8-bit mode allows an input at the full 9 GSPS maximum DAC sample rate and can synthesize wideband signals from 0 to 4.5 GHz.
An optional low jitter PLL/VCO simplifies the DAC clock generation by allowing use of a lower frequency reference clock. DAC38RF82 and DAC38RF89 support different VCO frequency ranges, summarized in Device Comparison Table.
Technical documentation
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View all 7 | Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | DAC38RF8x Dual-Channel, Differential-Output, 14-Bit, 9-GSPS, RF-Sampling DAC With JESD204B Interface, On-Chip PLL and Wide-Band Interpolation datasheet (Rev. D) | PDF | HTML | 14 Apr 2020 |
| Application note | Impact of Power-Supply Noise on Phase Noise Performance of RF DACs | 13 Jun 2018 | ||
| Application note | Eye Scan Testing with the DAC38RFxx | 10 Aug 2017 | ||
| Application note | Quick-Start Methods in Simulating the DAC38RF8x Input/Output Buffer Information | 02 Aug 2017 | ||
| Application note | DAC38RF8x Test Modes | 25 Jul 2017 | ||
| EVM User's guide | DAC38RF8xEVM User's Guide (Rev. A) | 24 Mar 2017 | ||
| Design guide | Efficient Power Supply Scheme for RF-Sampling DAC Reference Design | 22 Aug 2016 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
Evaluation board
DAC38RF89EVM — DAC38RF89 Dual-Channel, 14-Bit, 8.4GSPS, 1x-24x Interpolating, 5 & 7.5 GHz PLL DAC Evaluation Module
The DAC38RF89 evaluation module (EVM) is the circuit board for evaluating DAC38RF89 digital-to-analog converters (DACs). The DAC38RFEVM can be used to evaluate the performance of the DAC up to 9-GSPS sampling rate and is designed to work with the TSW14J56EVM (Rev B and up). The available FMC (...)
User guide: PDF
Firmware
TI204C-IP — Request for JESD204 rapid design IP
The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
Supported products & hardware
Products
High-speed DACs (>10 MSPS)
Transmitters
Receivers
High-speed ADCs (≥10 MSPS)
RF-sampling transceivers
GUI for evaluation module (EVM)
DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.20
This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)
Supported products & hardware
Products
High-speed DACs (>10 MSPS)
Transmitters
Receivers
High-speed ADCs (≥10 MSPS)
Ultrasound AFEs
RF-sampling transceivers
Hardware development
Evaluation board
Software
Support software
GUI for evaluation module (EVM)
SLAC722 — DAC38RF8x EVM GUI
Supported products & hardware
Products
High-speed DACs (>10 MSPS)
Transmitters
Hardware development
Evaluation board
Reference designs
TIDA-01215 — Power Supply Reference Design for Optimizing Spur and Phase Noise in RF-sampling DACs
This reference design provides an efficient power supply scheme to power-up the RF-sampling DAC38RF8x digital-to-analog data converter (DAC) without sacrificing performance and also reduces board area and BOM. The reference design uses both DC/DC switchers and an LDO to power-up the DAC38RF8x (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| FCCSP (AAV) | 144 | Ultra Librarian |
Ordering & quality
Information included:
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
Information included:
- Fab location
- Assembly location
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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