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LMK1C1104

ACTIVE

4-channel output LVCMOS 1.8-V buffer

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Data sheet

LMK1C1104

ACTIVE
Data sheet Order now

Product details

Function Clock buffer, Level translator, Single-ended Additive RMS jitter (typ) (fs) 19.2 Output frequency (max) (MHz) 250 Number of outputs 4 Output supply voltage (V) 1.8, 2.5, 3.3 Core supply voltage (V) 1.8, 2.5, 3.3 Output skew (ps) 25 Features 1:4 fanout, Synchronous output enable Operating temperature range (°C) -40 to 125 Rating Catalog Output type LVCMOS Input type LVCMOS
Function Clock buffer, Level translator, Single-ended Additive RMS jitter (typ) (fs) 19.2 Output frequency (max) (MHz) 250 Number of outputs 4 Output supply voltage (V) 1.8, 2.5, 3.3 Core supply voltage (V) 1.8, 2.5, 3.3 Output skew (ps) 25 Features 1:4 fanout, Synchronous output enable Operating temperature range (°C) -40 to 125 Rating Catalog Output type LVCMOS Input type LVCMOS
TSSOP (PW) 8 19.2 mm² 3 x 6.4 WSON (DQF) 8 4 mm² 2 x 2
  • High-performance 1:2, 1:3 or 1:4 LVCMOS clock buffer
  • Very low output skew < 50 ps
  • Extremely low additive jitter < 50 fs maximum
    • 7.5 fs typical at VDD = 3.3 V
    • 10 fs typical at VDD = 2.5 V
    • 19.2 fs typical at VDD = 1.8 V
  • Very low propagation delay < 3 ns
  • Synchronous output enable
  • Supply voltage: 3.3 V, 2.5 V, or 1.8 V
    • 3.3-V tolerant input at all supply voltages
    • Fail-safe inputs
  • fmax = 250 MHz for 3.3 V fmax = 200 MHz for 2.5 V and 1.8 V
  • Operating temperature range: –40°C to 125°C
  • Available in 8-pin TSSOP package
  • Available in 8-pin WSON package
  • High-performance 1:2, 1:3 or 1:4 LVCMOS clock buffer
  • Very low output skew < 50 ps
  • Extremely low additive jitter < 50 fs maximum
    • 7.5 fs typical at VDD = 3.3 V
    • 10 fs typical at VDD = 2.5 V
    • 19.2 fs typical at VDD = 1.8 V
  • Very low propagation delay < 3 ns
  • Synchronous output enable
  • Supply voltage: 3.3 V, 2.5 V, or 1.8 V
    • 3.3-V tolerant input at all supply voltages
    • Fail-safe inputs
  • fmax = 250 MHz for 3.3 V fmax = 200 MHz for 2.5 V and 1.8 V
  • Operating temperature range: –40°C to 125°C
  • Available in 8-pin TSSOP package
  • Available in 8-pin WSON package

The LMK1C110x is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments. The entire family is designed with a modular approach in mind. Three different fan-out variations, 1:2, 1:3, 1:4, are available.

All of the devices within this family are pin-compatible to each other and backwards compatible to the CDCLVC110x family for easy handling.

All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.

The LMK1C110x supports a synchronous output enable control (1G) which switches the outputs into a low state when 1G is low. These devices have a fail-safe input that prevents oscillation at the outputs in the absence of an input signal and allows for input signals before VDD is supplied.

The LMK1C110x family operates in a 1.8-V, 2.5-V and 3.3-V environment and are characterized for operation from –40°C to 125°C.

The LMK1C110x is a modular, high-performance, low-skew, general-purpose clock buffer family from Texas Instruments. The entire family is designed with a modular approach in mind. Three different fan-out variations, 1:2, 1:3, 1:4, are available.

All of the devices within this family are pin-compatible to each other and backwards compatible to the CDCLVC110x family for easy handling.

All family members share the same high performing characteristics such as low additive jitter, low skew, and wide operating temperature range.

The LMK1C110x supports a synchronous output enable control (1G) which switches the outputs into a low state when 1G is low. These devices have a fail-safe input that prevents oscillation at the outputs in the absence of an input signal and allows for input signals before VDD is supplied.

The LMK1C110x family operates in a 1.8-V, 2.5-V and 3.3-V environment and are characterized for operation from –40°C to 125°C.
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Technical documentation

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Type Title Date
* Data sheet LMK1C110x 1.8-V, 2.5-V, and 3.3-V LVCMOS Clock Buffer Family datasheet (Rev. D) PDF | HTML 18 Feb 2022
Application note Sine to Square Wave Conversion Using Clock Buffers PDF | HTML 03 Sep 2024
Application note EMC/EMI Compliant Design for Single Pair Ethernet PDF | HTML 22 Jul 2023
EVM User's guide LMK1C1104DQF Low-Additive, Phase-Noise LVCMOS Clock Buffer Evaluation Board PDF | HTML 16 Jun 2021
User guide LMK1C1104 Low-Additive, Phase-Noise LVCMOS Clock Buffer Evaluation Board (Rev. A) PDF | HTML 10 Dec 2020
Application note Clocking for Medical Ultrasound Systems (Rev. A) PDF | HTML 30 Sep 2020
Application note LMK1C110x Key Performance in System Level (Rev. A) 10 Mar 2020

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

LMK1C1104EVM — LMK1C1104 low jitter 1:4 LVCMOS fan-out buffer evaluation module

LMK1C1104 is a high-performance, low additive jitter LVCMOS clock buffer with one LVCMOS input, four LVCMOS outputs, and a global output enable pin. This evaluation module (EVM) is designed to demonstrate the electrical performance of the LMK1C1104, however, this EVM can also be used to evaluate (...)
User guide: PDF | HTML
Not available on TI.com
Evaluation board

LMK1C1108EVM — LMK1C1108 low jitter 1:8 LVCMOS fan-out buffer evaluation module

LMK1C1108 is a high-performance, low additive jitter LVCMOS clock buffer with one LVCMOS input, eight LVCMOS outputs, and a global output enable pin. This evaluation module (EVM) is designed to demonstrate the electrical performance of the LMK1C1108. This EVM can also be used to evaluate other (...)
User guide: PDF | HTML
Not available on TI.com
Simulation model

LMK1C1104 IBIS Model

SNAM234.ZIP (45 KB) - IBIS Model
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CAD/CAE symbol

LMK1C1104EVM Altium Database

SNAR039.ZIP (498 KB)
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Design tool

CLOCK-TREE-ARCHITECT — Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
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Design tool

PLLATINUMSIM-SW — PLLatinum Sim Tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

Supported products & hardware

Supported products & hardware

Products
RF PLLs & synthesizers
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Clock buffers
CDCDB2000 — DB2000QL compliant 20-output clock buffer for PCIe® Gen 1 to Gen 5 CDCDB400 — 4-output clock buffer for PCIe® Gen 1 to Gen 6 CDCDB800 — 8-output clock buffer for PCIe® Gen 1 to Gen 6 CDCDB803 — 8-output clock buffer for PCIe® Gen 1 to Gen 6 with selectable SMBus addresses CDCLVC1102 — Low jitter, 1:2 LVCMOS fan-out clock buffer CDCLVC1103 — Low jitter, 1:3 LVCMOS fan-out clock buffer CDCLVC1104 — Low jitter, 1:4 LVCMOS fan-out clock buffer CDCLVC1106 — Low jitter, 1:6 LVCMOS fan-out clock buffer CDCLVC1108 — Low jitter, 1:8 LVCMOS fan-out clock buffer CDCLVC1110 — Low jitter, 1:10 LVCMOS fan-out clock buffer CDCLVC1112 — Low jitter, 1:12 LVCMOS fan-out clock buffer CDCLVC1310 — Universal input, 10-output low impedance LVCMOS buffer CDCLVD110 — 1-to-10 LVDS clock buffer up to 900-MHz with minimum skew for clock distribution CDCLVD110A — 1-to-10 LVDS clock buffer up to 1100-MHz with minimum skew for clock distribution CDCLVD1204 — Low jitter, 2-input selectable 1:4 universal-to-LVDS buffer CDCLVD1208 — Low jitter, 2-input selectable 1:8 universal-to-LVDS buffer CDCLVD1212 — Low jitter, 2-input selectable 1:12 universal-to-LVDS buffer CDCLVD1213 — Low jitter, 1:4 universal-to-LVDS buffer with selectable output divider CDCLVD1216 — Low jitter, 2-input selectable 1:16 universal-to-LVDS buffer CDCLVD2102 — Low jitter, dual 1:2 universal-to-LVDS buffer CDCLVD2104 — Low jitter, dual 1:4 universal-to-LVDS buffer CDCLVD2106 — Low jitter, dual 1:6 universal-to-LVDS buffer CDCLVD2108 — Low jitter, dual 1:8 universal-to-LVDS buffer CDCLVP110 — 1:10 LVPECL/HSTL to LVPECL clock driver CDCLVP1102 — Low jitter 1:2 universal-to-LVPECL buffer CDCLVP111 — 1:10 LVPECL buffer with selectable input CDCLVP111-EP — HiRel, 1:10 LVPECL buffer with selectable input CDCLVP111-SP — 1:10 high speed clock buffer with selectable input clock driver CDCLVP1204 — Low-jitter, two-input, selectable 1:4 universal-to-LVPECL buffer CDCLVP1208 — Low jitter, 2-input selectable 1:8 universal-to-LVPECL buffer CDCLVP1212 — Low jitter, 2-input selectable 1:12 universal-to-LVPECL buffer CDCLVP1216 — Low jitter, 2-input selectable 1:16 universal-to-LVPECL buffer CDCLVP2102 — Low jitter, dual 1:2 universal-to-LVPECL buffer CDCLVP2104 — Low jitter, dual 1:4 universal-to-LVPECL buffer CDCLVP2106 — Low jitter, dual 1:6 universal-to-LVPECL buffer CDCLVP2108 — Low jitter, dual 1:8 universal-to-LVPECL buffer CDCLVP215 — Dual 1:5 high speed LVPECL fan out buffer LMK00301 — 3-GHz, 10-output differential fanout buffer / level translator LMK00304 — 3.1-GHz differential clock buffer/level translator with 4 configurable outputs LMK00306 — 3.1-GHz differential clock buffer/level translator with 6 configurable outputs LMK00308 — 3.1-GHz differential clock buffer/level translator with 8 configurable outputs LMK00334 — 4-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK00334-Q1 — Automotive 4-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK00338 — 8-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator LMK1C1102 — 2-channel output LVCMOS 1.8-V buffer LMK1C1103 — 3-channel output LVCMOS 1.8-V buffer LMK1C1104 — 4-channel output LVCMOS 1.8-V buffer LMK1C1106 — 6-channel output LVCMOS 1.8-V buffer LMK1C1108 — 8-channel output LVCMOS 1.8-V buffer LMK1D1204 — 4-channel output LVDS 1.8-V buffer LMK1D1204P — 4-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer with pin control LMK1D1208 — 8-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer LMK1D1208I — 8-channel output, 1.8-V, 2.5-V, and 3.3-V LVDS buffer with I²C LMK1D1208P — 8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer with pin control LMK1D1212 — 12-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer LMK1D1216 — 16-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer LMK1D2102 — Dual bank 2-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer LMK1D2102L — Low additive jitter LVDS buffer LMK1D2104 — Dual bank 4-channel output 1.8V, 2.5V and 3.3V LVDS buffer LMK1D2106 — Dual bank 6-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer LMK1D2108 — Dual bank 8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer
Clock generators
LMK03318 — Ultra-low jitter clock generator family with single PLL LMK03328 — Ultra-low jitter clock generator family with two independent PLLs LMK03806 — Ultra-low jitter clock generator with 14 outputs
IQ demodulators
LMX8410L — High-Performance Mixer With Integrated Synthesizer
Clock jitter cleaners
LMK04208 — Ultra low-noise clock jitter cleaner with 6 programmable outputs LMK04368-EP — Enhanced product ultra-low-noise 3.2-GHz JESD204C jitter cleaner LMK04714-Q1 — Automotive, ultra low-noise 3.2-GHz, JESD204B and JESD204C dual-loop clock jitter cleaner LMK04803 — Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 1.9-GHz VCO LMK04805 — Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 2.2-GHz VCO LMK04806 — Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 2.5-GHz VCO LMK04808 — Low-noise clock jitter cleaner with dual loop PLLs and integrated 2.9-GHz VCO LMK04816 — Three input low-noise clock jitter cleaner with dual loop PLLs LMK04821 — Ultra low jitter synthesizer and jitter cleaner with JESD204B support LMK04826 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 1840 to1970-MHz VCO0 LMK04828 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0. LMK04828-EP — Ultra low-noise JESD204B compliant clock jitter cleaner with temperature range -55 to 105c LMK04832 — Ultra-low-noise, 3.2-GHz, 15-output, JESD204B clock jitter cleaner with dual loop LMK04832-SEP — Radiation-tolerant, 30-krad, ultra-low-noise, 3.2-GHz 15-output JESD204C clock jitter cleaner LMK04832-SP — Radiation-hardened-assured (RHA), ultra-low-noise, 3.2-GHz, 15-output clock jitter cleaner LMK04906 — Ultra low noise clock jitter cleaner/multiplier with 6 programmable outputs
Clock network synchronizers
LMK05028 — Low-jitter dual-channel network synchronizer clock LMK05318 — Ultra-low jitter single channel network synchronizer clock with BAW LMK05318B — Ultra-low jitter single channel network synchronizer clock with BAW LMK05318B-Q1 — Automotive ultra-low jitter network synchronizer and clock generator LMK5B33216 — 16-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO LMK5B33414 — 14-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO LMK5C33216 — Ultra-low jitter clock synchronizer with JESD204B for wireless communications with BAW LMK5C33216A — Three DPLL, three APLL, two-input and 16-output network synchronizer with JESD204B/C and BAW VCO
Hardware development
Evaluation board
LMK04832EVM — LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module LMX2571EPEVM — LMX2571-EP evaluation module for 1.34-GHz, low-power, extreme-temperature RF synthesizer LMX2594PSEVM — LMX2594 evaluation module for 15-GHz RF synthesizer with multiple-device phase synchronization XMICR-3P-LMX2492 — LMX2492 X-MWblock evaluation modules XMICR-3P-LMX2572 — LMX2572 X-MWblock evaluation modules XMICR-3P-LMX2592 — LMX2592 X-MWblock evaluation modules XMICR-3P-LMX2594 — LMX2594 X-MWblock evaluation modules XMICR-3P-LMX2595 — LMX2595 X-MWblock evaluation modules
Software
Application software & framework
TICSPRO-SW — Texas Instruments Clocks and Synthesizers (TICS) Pro Software
IDE, configuration, compiler or debugger
CODELOADER — CodeLoader Software for device register programming
Support software
LMX9830-SW — LMX9830 Application Notes, Software, and Tools LMX9838-SW — LMX9838 Application Notes, Software, and Tools
Download options
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Reference designs

TIDA-010230 — Multi-channel RF transceiver, low-noise clocking reference design for radar and EW applications

In modern radar and electronic warfare (EW) systems, active electronically-scanned array (AESA) antenna systems are often used with high speed multi-channel RF transceivers. These systems require very low noise clocking capable of precise channel-to-channel skew adjustment to achieve the optimal (...)
Design guide: PDF
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 8 Ultra Librarian
WSON (DQF) 8 Ultra Librarian
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