The SN74AVC8T245-Q1 is an
8-bit noninverting bus transceiver that uses two separate configurable power-supply
rails. The SN74AVC8T245-Q1 operation is optimal with V CCA and
V CCB set at 1.4 V to 3.6 V. It is
operational with V CCA and V CCB as low as 1.2 V. The A port is
designed to track V CCA. V CCA accepts any supply voltage from
1.2 V to 3.6 V. The B port is designed to track V CCB. V CCB
accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal
low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V,
and 3.3-V voltage nodes.
The SN74AVC8T245-Q1 design
enables asynchronous communication between data buses. The device transmits data
from the A bus to the B bus or from the B bus to the A bus, depending on the logic
level at the direction-control (DIR) input. One can use the output-enable
( OE) input to disable the outputs so the buses are
effectively isolated.
In the SN74AVC8T245-Q1
design, V CCA supplies the control pins (DIR and
OE).
This device specification covers
partial-power-down applications using I off. The I off circuitry
disables the outputs when the device is powered down. This inhibits current backflow
into the device which prevents damage to the device.
The V CC isolation feature
allows both ports to be in the high-impedance state if either V CC input
is at GND.
To put the device in the
high-impedance state during power up or power down, tie OE to
V CC through a pullup resistor; the current-sinking capability of the
driver determines the minimum value of the resistor.
The SN74AVC8T245-Q1 is an
8-bit noninverting bus transceiver that uses two separate configurable power-supply
rails. The SN74AVC8T245-Q1 operation is optimal with V CCA and
V CCB set at 1.4 V to 3.6 V. It is
operational with V CCA and V CCB as low as 1.2 V. The A port is
designed to track V CCA. V CCA accepts any supply voltage from
1.2 V to 3.6 V. The B port is designed to track V CCB. V CCB
accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal
low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V,
and 3.3-V voltage nodes.
The SN74AVC8T245-Q1 design
enables asynchronous communication between data buses. The device transmits data
from the A bus to the B bus or from the B bus to the A bus, depending on the logic
level at the direction-control (DIR) input. One can use the output-enable
( OE) input to disable the outputs so the buses are
effectively isolated.
In the SN74AVC8T245-Q1
design, V CCA supplies the control pins (DIR and
OE).
This device specification covers
partial-power-down applications using I off. The I off circuitry
disables the outputs when the device is powered down. This inhibits current backflow
into the device which prevents damage to the device.
The V CC isolation feature
allows both ports to be in the high-impedance state if either V CC input
is at GND.
To put the device in the
high-impedance state during power up or power down, tie OE to
V CC through a pullup resistor; the current-sinking capability of the
driver determines the minimum value of the resistor.