SN74CBTLV16210

ACTIVE

Product details

Configuration 1:1 SPST Number of channels 20 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -40 to 85 Features Powered-off protection Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
Configuration 1:1 SPST Number of channels 20 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 200 Operating temperature range (°C) -40 to 85 Features Powered-off protection Input/output continuous current (max) (mA) 128 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
SSOP (DL) 48 164.358 mm² 15.88 x 10.35 TSSOP (DGG) 48 101.25 mm² 12.5 x 8.1 TVSOP (DGV) 48 62.08 mm² 9.7 x 6.4
  • Member of the Texas Instruments Widebus™ Family
  • 5- Switch Connection Between Two Ports
  • Rail-to-Rail Switching on Data I/O Ports
  • Ioff Supports Parital-Power-Down Mode

Widebus is a trademark of Texas Instruments.

  • Member of the Texas Instruments Widebus™ Family
  • 5- Switch Connection Between Two Ports
  • Rail-to-Rail Switching on Data I/O Ports
  • Ioff Supports Parital-Power-Down Mode

Widebus is a trademark of Texas Instruments.

The SN74CBTLV16210 provides 20 bits of high-speed bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as dual 10-bit bus switches with separate output-enable (OE\) inputs. It can be used as two 10-bit bus switches or as one 20-bit bus switch. When OE\ is low, the associated 10-bit bus switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CBTLV16210 provides 20 bits of high-speed bus switching. The low on-state resistance of the switch allows connections to be made with minimal propagation delay.

The device is organized as dual 10-bit bus switches with separate output-enable (OE\) inputs. It can be used as two 10-bit bus switches or as one 20-bit bus switch. When OE\ is low, the associated 10-bit bus switch is on, and port A is connected to port B. When OE\ is high, the switch is open, and the high-impedance state exists between the two ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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Technical documentation

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Type Title Date
* Data sheet SN74CBTLV16210 datasheet (Rev. J) 19 Jul 2004
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dec 2021
Application brief Eliminate Power Sequencing with Powered-off Protection Signal Switches (Rev. C) PDF | HTML 06 Jan 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
More literature Digital Bus Switch Selection Guide (Rev. A) 10 Nov 2004
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note Bus FET Switch Solutions for Live Insertion Applications 07 Feb 2003
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
More literature Standard Linear & Logic for PCs, Servers & Motherboards 13 Jun 2002
User guide CBT (5-V) And CBTLV (3.3-V) Bus Switches Data Book (Rev. B) 01 Dec 1998

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Simulation model

HSPICE Model of SN74CBTLV16210

SCDJ020.ZIP (90 KB) - HSpice Model
Simulation model

SN74CBTLV16210 IBIS Model

SCDM068.ZIP (25 KB) - IBIS Model
Package Pins CAD symbols, footprints & 3D models
SSOP (DL) 48 Ultra Librarian
TSSOP (DGG) 48 Ultra Librarian
TVSOP (DGV) 48 Ultra Librarian

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