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SN74LV8T7541

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Octal buffer with open-drain outputs, dual enable and level-shifting

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Data sheet

SN74LV8T7541

ACTIVE
Data sheet Order now

Product details

Bits (#) 8 Data rate (max) (Mbps) 150 Topology Open drain Direction control (typ) Fixed-direction Output drive capability (max) (mA) 8000 Vin (min) (V) 1.65 Vin (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 Applications GPIO Features Output enable, Single supply Prop delay (ns) 13.7 Technology family LVxT Supply current (max) (mA) 1.5 Rating Catalog Operating temperature range (°C) -40 to 125
Bits (#) 8 Data rate (max) (Mbps) 150 Topology Open drain Direction control (typ) Fixed-direction Output drive capability (max) (mA) 8000 Vin (min) (V) 1.65 Vin (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 Applications GPIO Features Output enable, Single supply Prop delay (ns) 13.7 Technology family LVxT Supply current (max) (mA) 1.5 Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4 VQFN (RKS) 20 11.25 mm² 4.5 x 2.5 VSSOP (DGS) 20 24.99 mm² 5.1 x 4.9
  • Wide operating range of 1.65V to 5.5V
  • 5.5V tolerant input pins
  • LVxT enhanced inputs combined with open-drain outputs provide maximum voltage translation flexibility:
    • Over 6.67Mbps operation, (RPU = 1kΩ,CL = 30pF)
    • Up translation from 1.2V to 5V with 1.8V supply
    • Down translation from 5V to 0.8V or even less with any valid supply
  • Supports standard function pinout
  • Latch-up performance exceeds 250mAper JESD 17
  • Wide operating range of 1.65V to 5.5V
  • 5.5V tolerant input pins
  • LVxT enhanced inputs combined with open-drain outputs provide maximum voltage translation flexibility:
    • Over 6.67Mbps operation, (RPU = 1kΩ,CL = 30pF)
    • Up translation from 1.2V to 5V with 1.8V supply
    • Down translation from 5V to 0.8V or even less with any valid supply
  • Supports standard function pinout
  • Latch-up performance exceeds 250mAper JESD 17

The SN74LV8T7541 is an octal buffer with open-drain outputs.

The input is designed with a reduced threshold circuit to support up translation when the supply voltage is larger than the input voltage. Additionally, the 5V tolerant input pins enable down translation when the input voltage is larger than the supply voltage. The output level is always referenced to the supply voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.

The SN74LV8T7541 is an octal buffer with open-drain outputs.

The input is designed with a reduced threshold circuit to support up translation when the supply voltage is larger than the input voltage. Additionally, the 5V tolerant input pins enable down translation when the input voltage is larger than the supply voltage. The output level is always referenced to the supply voltage (VCC) and supports 1.8V, 2.5V, 3.3V, and 5V CMOS levels.
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* Data sheet SN74LV8T7541 Octal Buffers With Open-Drain Outputs and Logic-Level Shifter datasheet PDF | HTML 04 Nov 2025

Design & development

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Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

User guide: PDF | HTML
Not available on TI.com
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 20 Ultra Librarian
VQFN (RKS) 20 Ultra Librarian
VSSOP (DGS) 20 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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