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SN54LS393-SP

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双路 4 位二进制计数器

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SN54LS393-SP

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产品详情

Function Counter Bits (#) 4 Technology family LS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Input type Bipolar Output type Push-Pull Features High speed (tpd 10-50ns) Operating temperature range (°C) -55 to 125 Rating Space
Function Counter Bits (#) 4 Technology family LS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Input type Bipolar Output type Push-Pull Features High speed (tpd 10-50ns) Operating temperature range (°C) -55 to 125 Rating Space
CFP (W) 14 58.023 mm² 9.21 x 6.3
  • Dual Versions of the Popular '90A, 'LS90 and '93A, 'LS93
  • '390, 'LS390 … Individual Clocks for A and B Flip-Flops Provide Dual ÷ 2 and ÷ 5 Counters
  • '393, 'LS393 … Dual 4-Bit Binary Counter with Individual Clocks
  • All Have Direct Clear for Each 4-Bit Counter
  • Dual 4-Bit Versions Can Significantly Improve System Densities by Reducing Counter Package Count by 50%
  • Typical Maximum Count Frequency … 35 MHz
  • Buffered Outputs Reduce Possibility of Collector Commutation

 
  • Dual Versions of the Popular '90A, 'LS90 and '93A, 'LS93
  • '390, 'LS390 … Individual Clocks for A and B Flip-Flops Provide Dual ÷ 2 and ÷ 5 Counters
  • '393, 'LS393 … Dual 4-Bit Binary Counter with Individual Clocks
  • All Have Direct Clear for Each 4-Bit Counter
  • Dual 4-Bit Versions Can Significantly Improve System Densities by Reducing Counter Package Count by 50%
  • Typical Maximum Count Frequency … 35 MHz
  • Buffered Outputs Reduce Possibility of Collector Commutation

 

Each of these monolithic circuits contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters in a single package. The '390 and 'LS390 incorporate dual divide-by-two and divide-by-five counters, which can be used to implement cycle lengths equal to any whole and/or cumulative multiples of 2 and/or 5 up to divide-by-100. When connected as a bi-quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output stage. The '393 and 'LS393 each comprise two independent four-bit binary counters each having a clear and a clock input. N-bit binary counters can be implemented with each package providing the capability of divide-by-256. The '390, 'LS390, '393, and 'LS393 have parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals. Series 54 and Series 54LS circuits are characterized for operation over the full military temperature range of -55°C to 125°C; Series 74 and Series 74LS circuits are characterized for operation from 0°C to 70°C.

 

Each of these monolithic circuits contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters in a single package. The '390 and 'LS390 incorporate dual divide-by-two and divide-by-five counters, which can be used to implement cycle lengths equal to any whole and/or cumulative multiples of 2 and/or 5 up to divide-by-100. When connected as a bi-quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output stage. The '393 and 'LS393 each comprise two independent four-bit binary counters each having a clear and a clock input. N-bit binary counters can be implemented with each package providing the capability of divide-by-256. The '390, 'LS390, '393, and 'LS393 have parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals. Series 54 and Series 54LS circuits are characterized for operation over the full military temperature range of -55°C to 125°C; Series 74 and Series 74LS circuits are characterized for operation from 0°C to 70°C.

 
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包含信息：
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  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
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  • 封装厂地点

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