SN54LS91
- For applications in:
- Digital Computer Systems
- Data-Handling Systems
- Control Systems
TYPE | TYPICAL MAXIMUM CLOCK FREQUENCY | TYPICAL POWER DISSIPATION | |||
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These monolithic serial-in, serial-out, 8-bit shift registers utilize transistor-transistor logic (TTL) circuits and are composed of eight R-S master-slave flip-flops, input gating, and a clock driver. Single-rail data and input control are gated through inputs A and B and an interanl inverter to form the complementary inputs to the first bit of the shift register. Drive for the internal common clock line is provided by an inverting clock driver. This clock pulse inverter/driver causes these circuits to shift information one bit on the positive edge of an input clock pulse.
技术文档
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查看全部 1 类型 | 标题 | 下载最新的英语版本 | 日期 | |||
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* | 数据表 | 8-Bit Shift Registers 数据表 | 1988年 3月 1日 |
订购和质量
包含信息:
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
包含信息:
- 制造厂地点
- 封装厂地点