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TIDA-010259

Cascaded LMX1204 reference design

TIDA-010259

Design files

Overview

The cascaded LMX1204 Reference Design distributes a single clock input to 16 clock outputs.  It is suitable for high frequency operation up to 12.8 GHz with negligible phase noise impact to the clock signal.  It is ideally suitable for clocking high speed data converters in large phased array systems.

Features
  • 1:16 High Frequency Clock Distribution        
  •  Frequency operation up to 12.8 GHz         
  •  Options for clock dividing and clock multiplication         
  •  Incorporates 16 SysRef outputs for JESD204B applications         
  •  Negligible phase noise degradataion     
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A fully assembled board has been developed for testing and performance validation only, and is not available for sale.

Design files & products

Design files

Download ready-to-use system files to speed your design process.

PDF | HTML
TIDUF69.PDF (640 K)

Reference design overview and verified performance test data

TIDMCS9.PDF (1269 K)

Detailed schematic diagram for design layout and components

TIDMCT0.PDF (188 K)

Complete listing of design components, reference designators, and manufacturers/part numbers

TIDMCT1.PDF (2155 K)

Detailed overview of design layout for component placement

TIDMCT3.ZIP (21426 K)

Files used for 3D models or 2D drawings of IC components

TIDCGO2.ZIP (480 K)

Design file that contains information on physical board layer of design PCB

TIDMCT2.ZIP (1441 K)

PCB layer plot file used for generating PCB design layout

Products

Includes TI products in the design and potential alternatives.

RF PLLs & synthesizers

LMX120412.8-GHz RF buffer, multiplier and divider with JESD204B/C SYSREF support and phase synchronization

Data sheet: PDF | HTML

Technical documentation

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Type Title Date
Design guide Cascaded Clock Distribution Reference Design Supports 16 High Frequency Outputs PDF | HTML Mar. 04, 2024

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