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LMX1204

ACTIVE

12.8-GHz RF buffer, multiplier and divider with JESD204B/C SYSREF support and phase synchronization

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Data sheet

LMX1204

ACTIVE
Data sheet Order now

Product details

Frequency (max) (MHz) 12800 Frequency (min) (MHz) 300 Features Integrated multiplier and divider modes, JESD204B/C SYSREF support, Phase synchronization, RF clock distribution, Ultra-low additive jitter Current consumption (mA) 405 Integrated VCO No Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) Loop BW dependent
Frequency (max) (MHz) 12800 Frequency (min) (MHz) 300 Features Integrated multiplier and divider modes, JESD204B/C SYSREF support, Phase synchronization, RF clock distribution, Ultra-low additive jitter Current consumption (mA) 405 Integrated VCO No Operating temperature range (°C) -40 to 85 Rating Catalog Lock time (µs) (typ) (s) Loop BW dependent
VQFN (RHA) 40 36 mm² 6 x 6
  • 300MHz to 12.8GHz output frequency
  • Ultra-low noise
    • Noise floor of –161dBc/Hz at 6GHz output
    • 1/f Noise of –154dBc/Hz at 6GHz output, 10kHz offset
    • 5fs jitter (12kHz to 20MHz)
    • <30fs additive jitter (DC to fCLK )
  • 4 high-frequency clocks with corresponding SYSREF outputs
    • Shared divider that supports ÷1 (buffer mode), ÷2, 3, 4, 5, 6, 7, and 8
    • Shared PLL-based multiplier that supports x1 (filter mode), x2, x3, and x4
  • LOGICLK and corresponding SYSREF outputs
    • On separate divide bank
    • ÷1, 2, 4 pre-divider
    • ÷1 (bypass), 2, …, 1023 post divider
  • 8 programmable output power levels
  • Synchronized SYSREF clock outputs
    • 508 delay step adjustments of less than 2.5ps each at 12.8GHz
    • Generator and repeater modes
    • Windowing feature for SYSREFREQ pins to optimize timing
  • SYNC feature to all divides and multiple devices
  • 2.5V operating voltage
  • –40ºC to 85ºC operating temperature
  • 300MHz to 12.8GHz output frequency
  • Ultra-low noise
    • Noise floor of –161dBc/Hz at 6GHz output
    • 1/f Noise of –154dBc/Hz at 6GHz output, 10kHz offset
    • 5fs jitter (12kHz to 20MHz)
    • <30fs additive jitter (DC to fCLK )
  • 4 high-frequency clocks with corresponding SYSREF outputs
    • Shared divider that supports ÷1 (buffer mode), ÷2, 3, 4, 5, 6, 7, and 8
    • Shared PLL-based multiplier that supports x1 (filter mode), x2, x3, and x4
  • LOGICLK and corresponding SYSREF outputs
    • On separate divide bank
    • ÷1, 2, 4 pre-divider
    • ÷1 (bypass), 2, …, 1023 post divider
  • 8 programmable output power levels
  • Synchronized SYSREF clock outputs
    • 508 delay step adjustments of less than 2.5ps each at 12.8GHz
    • Generator and repeater modes
    • Windowing feature for SYSREFREQ pins to optimize timing
  • SYNC feature to all divides and multiple devices
  • 2.5V operating voltage
  • –40ºC to 85ºC operating temperature

The high-frequency capability and extremely low jitter of this device, makes a great approach to clock precision, high-frequency data converters without degradation to the signal-to-noise ratio. Each of the four high-frequency clock outputs, and additional LOGICLK output with larger divider range, is paired with a SYSREF output clock signal. The SYSREF signal for JESD interfaces can either be internally generated or passed in as an input and re-clocked to the device clocks. For data converter clocking applications, having the jitter of the clock be less than the aperture jitter of the data converter is critical. In applications where more than four data converters must be clocked, a variety of cascading architectures can be developed using multiple devices to distribute all the high-frequency clocks and SYSREF signals required. With low jitter and noise floor, this device combined with an ultra-low noise reference clock source is an exemplary selection for clocking data converters, especially when sampling above 3GHz.

The high-frequency capability and extremely low jitter of this device, makes a great approach to clock precision, high-frequency data converters without degradation to the signal-to-noise ratio. Each of the four high-frequency clock outputs, and additional LOGICLK output with larger divider range, is paired with a SYSREF output clock signal. The SYSREF signal for JESD interfaces can either be internally generated or passed in as an input and re-clocked to the device clocks. For data converter clocking applications, having the jitter of the clock be less than the aperture jitter of the data converter is critical. In applications where more than four data converters must be clocked, a variety of cascading architectures can be developed using multiple devices to distribute all the high-frequency clocks and SYSREF signals required. With low jitter and noise floor, this device combined with an ultra-low noise reference clock source is an exemplary selection for clocking data converters, especially when sampling above 3GHz.
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Technical documentation

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Type Title Date
* Data sheet LMX1204 Low-Noise, High-Frequency JESD Buffer/Multiplier/Divider datasheet (Rev. B) PDF | HTML 20 Feb 2024
Application note Practical Clocking Considerations That Give Your Next High-Speed Converter Design an Edge (Rev. A) PDF | HTML 11 Apr 2025
Design guide Cascaded Clock Distribution Reference Design Supports 16 High Frequency Outputs PDF | HTML 04 Mar 2024
Application note Cascaded LMX1204 Phase-Error Analysis PDF | HTML 12 Jan 2023
Application note LMX1204 Multiplier Clock Distribution Drives Large Phased-Array Systems PDF | HTML 31 Oct 2022
User guide LMX1204 Register Map (Rev. A) PDF | HTML 28 Sep 2022
Application note Getting the Most of Your Data Converter Clocking System Using LMX1204 PDF | HTML 23 Jun 2022

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

LMX1204EVM — LMX1204 evaluation module for RF buffer, multiplier and divider with JESD204B/C SYSREF support

The LMX1204 evaluation module (EVM) is designed to evaluate the performance of the LMX1204, which is a four-output, ultra-low additive jitter radio-frequency (RF) buffer, divider and multiplier. This EVM can buffer RF clocking inputs up to 12.8 GHz, multiply x2, x3 or x4 in the output range of 3.2 (...)

User guide: PDF | HTML
Not available on TI.com
Support software

TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices

Texas Instruments clocks and synthesizers (TICS) pro software is used to program the evaluation modules (EVMs) for product numbers with these prefixes: CDC, LMK and LMX. These products include phase-locked loops and voltage-controlled oscillators (PLL+VCO), synthesizers and clocking devices.

Supported products & hardware

Supported products & hardware

Products
Clock generators
  • CDCE6214-Q1 — Ultra-low power clock generator supporting PCIe gen 1-5 with 2 inputs, 4 outputs and internal EEPROM
  • CDCI6214 — PCIe Gen4 support ultra-low power clock generator with four programmable outputs & EEPROM
  • LMK02000 — 1 to 800-MHz, precision clock distributor with integrated PLL and 3 LVDS / 5 LVPECL outputs
  • LMK02002 — 1 to 800-MHz, precision clock distributor with integrated PLL and 4 LVPECL outputs
  • LMK03200 — Precision 0-delay clock conditioner with integrated VCO
  • LMK03318 — Ultra-low jitter clock generator family with single PLL
  • LMK03328 — Ultra-low jitter clock generator family with two independent PLLs
  • LMK03806 — Ultra-low jitter clock generator with 14 outputs
  • LMK3H0102 — Bulk acoustic wave (BAW)-based PCIe Gen 1 to Gen 7-compliant referenceless clock generator
Clock buffers
  • CDCDB2000 — DB2000QL compliant 20-output clock buffer for PCIe® Gen 1 to Gen 7
  • CDCDB800 — 8-output clock buffer for PCIe® Gen 1 to Gen 7
  • LMK01000 — 1.6-GHz high performance clock buffer, divider, and distributor with 3 LVDS & 5 LVPECL outputs
  • LMK01010 — 1.6-GHz high performance clock buffer, divider, and distributor with 8 LVDS outputs
  • LMK01020 — 1.6-GHz high performance clock buffer, divider, and distributor with 8 LVPECL outputs
  • LMK01801 — Dual clock distribution
  • LMK1D1208I — 8-channel output, 1.8-V, 2.5-V, and 3.3-V LVDS buffer with I²C
  • LMKDB1104 — 4-output LP-HCSL clock buffer for PCIe PCIe Gen 1 to Gen 7
  • LMKDB1108 — 8-output LP-HCSL clock buffer for PCIe Gen 1 to Gen 7
  • LMKDB1120 — DB2000QL-compliant 20-output clock buffer for PCIe Gen 1 to Gen 7
  • LMKDB1204 — 2-input 4-output LP-HCSL clock multiplexer for PCIe Gen 1 to Gen 7
Oscillators
  • LMK61E0M — LVCMOS ultra-low jitter programmable oscillator with internal EEPROM
  • LMK61E2 — Ultra-low jitter, EEPROM programmable oscillator for medical imaging and test and measurement
Clock jitter cleaners
  • LMK04100 — Precision clock conditioners clock jitter cleaner with cascaded PLLs
  • LMK04101 — Jitter cleaner with integrated 1430 to 1570-MHz VCO:3 outputs for 2VPEC/LVPEC+4 outputs for LVCOMS
  • LMK04102 — Jitter cleaner with integrated 1600 to 1750-MHz VCO:3 outputs for 2VPEC/LVPEC+4 outputs for LVCOMS
  • LMK04110 — Jitter cleaner with integrated 1185 to 1296-MHz VCO:5 outputs for 2VPEC/LVPEC
  • LMK04111 — Jitter cleaner with integrated 1430 to 1570-MHz VCO:5 outputs for 2VPEC/LVPEC
  • LMK04131 — Jitter cleaner with integrated 1430 to 1570-MHz VCO:2 outputs for 2VPEC/LVPEC+LVDS+LVCOMS
  • LMK04133 — Jitter cleaner with integrated 1840 to 2160-MHz VCO:2 outputs for 2VPEC/LVPEC+LVDS+LVCOMS
  • LMK04208 — Ultra low-noise clock jitter cleaner with 6 programmable outputs
  • LMK04228 — Ultra low-noise clock jitter cleaner with dual loop PLLs
  • LMK04368-EP — Enhanced product ultra-low-noise 3.2-GHz JESD204C jitter cleaner
  • LMK04610 — Ultra low-noise and low power JESD204B compliant clock jitter cleaner with dual PLLs
  • LMK04616 — Ultra low-noise and low power JESD204B compliant clock jitter cleaner
  • LMK04714-Q1 — Automotive, ultra low-noise 3.2-GHz, JESD204B and JESD204C dual-loop clock jitter cleaner
  • LMK04803 — Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 1.9-GHz VCO
  • LMK04816 — Three input low-noise clock jitter cleaner with dual loop PLLs
  • LMK04821 — Ultra low jitter synthesizer and jitter cleaner with JESD204B support
  • LMK04826 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 1840 to1970-MHz VCO0
  • LMK04828 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.
  • LMK04828-EP — Ultra low-noise JESD204B compliant clock jitter cleaner with temperature range -55 to 105c
  • LMK04832 — Ultra-low-noise, 3.2-GHz, 15-output, JESD204B clock jitter cleaner with dual loop
  • LMK04832-SEP — Radiation-tolerant, 30-krad, ultra-low-noise, 3.2-GHz 15-output JESD204C clock jitter cleaner
  • LMK04832-SP — Radiation-hardened-assured (RHA), ultra-low-noise, 3.2-GHz, 15-output clock jitter cleaner
Clock network synchronizers
  • LMK05028 — Low-jitter dual-channel network synchronizer clock
  • LMK05318 — Ultra-low jitter single channel network synchronizer clock with BAW
  • LMK05318B — Ultra-low jitter single channel network synchronizer clock with BAW
  • LMK5B12204 — Ultra-low jitter clock generator with network synchronization and BAW technology
  • LMK5B12212 — Ultra-low-jitter, 12-output, one DPLL, two APLL network synchronizer with integrated 2.5-GHz BAW VCO
  • LMK5B33216 — 16-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO
  • LMK5B33414 — 14-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO
  • LMK5C22212A — Three DPLL, two APLL, two-input and 12-output network synchronizer with BAW VCO 
  • LMK5C33216 — Ultra-low jitter clock synchronizer with JESD204B for wireless communications with BAW
  • LMK5C33216A — Three DPLL, three APLL, two-input and 16-output network synchronizer with JESD204B/C and BAW VCO
RF PLLs & synthesizers
  • LMX1204 — 12.8-GHz RF buffer, multiplier and divider with JESD204B/C SYSREF support and phase synchronization
  • LMX1214 — 1:5 18GHz RF buffer and divider with auxiliary clock
  • LMX1404-EP — 15 GHz Buffer/Multiplier/Divider with SYSREF (JESD204B/C support) and FPGA Clock
  • LMX1860-SEP — Rad tolerant 15GHz RF buffer, multiplier, divider with SYSREF (JESD204B/C support) and FPGA clock
  • LMX1906-SP — Radiation-hardness-assured (RHA) 15GHz buffer, multiplier and divider with SYSREF and FPGA clock
  • LMX2485 — 500-MHz to 3-GHz delta-sigma low power dual PLL for RF personal communications
  • LMX2485E — 50-MHz to 3-GHz delta-sigma low power dual PLL for RF personal communications
  • LMX2485Q-Q1 — 500MHz to 3GHz automotive delta-sigma low power dual PLL
  • LMX2486 — 1-GHz to 4.5-GHz delta-sigma low power dual PLL for RF personal communications
  • LMX2487 — 1 to 6-GHz delta-sigma low power dual PLLatinum frequency synthesizer with 3.0-GHz integer PLL
  • LMX2487E — 3-GHz to 7.5-GHz delta-sigma low power dual PLL for RF personal communications
  • LMX2491 — 6.4-GHz low noise fractional-N PLL with ramp/chirp generation
  • LMX2492 — 500MHz to 14GHz wideband, low noise fractional-N PLL with ramp/chirp generation
  • LMX2492-Q1 — Automotive grade 500-MHz to 14-GHz wideband, low noise fractional-N PLL with ramp/chirp generation
  • LMX2531 — High performance frequency synthesizer system with integrated VCO
  • LMX2541 — Ultra-low noise PLLatinum frequency synthesizer with integrated VCO
  • LMX2571 — 1.34-GHz, low-power, extreme-temperature RF synthesizer with frequency-shift keying (FSK) modulation
  • LMX2571-EP — Enhanced-product, 1.34-GHz, low-power, extreme-temperature RF synthesizer with FSK modulation
  • LMX2572 — 6.4-GHz low-power wideband RF synthesizer
  • LMX2572LP — 2-GHz low power wideband RF synthesizer with FSK modulation
  • LMX2581 — 3.76-GHz wideband frequency synthesizer with integrated VCO
  • LMX2581E — 3.8-GHz wideband frequency synthesizer with integrated VCO
  • LMX2582 — 5.5-GHz high performance, wideband PLLatinum RF synthesizer
  • LMX2592 — 9.8-GHz wideband frequency synthesizer with integrated VCO
  • LMX2594 — 15-GHz wideband PLLatinum™ RF synthesizer with phase synchronization and JESD204B support
  • LMX2595 — 20-GHz wideband RF synthesizer with phase synchronization & JESD204B support
  • LMX2820 — 22.6-GHz wideband RF synthesizer with phase synchronization, JESD and <5-µs frequency calibration
  • LMX1205 — Low-noise, high-frequency buffer/multiplier/divider with JESD204 support and prog. clock delays
  • LMX2624-SP — 5MHz to 28GHz space-grade wideband synthesizer with phase synchronization and JESD204B support
Hardware development
Evaluation board
  • LMK03806BEVAL — LMK03806B Evaluation Board
  • LMK04208EVM — Two Input, 6+1 Output, Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.9 GHz VCO
  • LMK04616EVM — LMK04616 Evaluation Module
  • LMK04805BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.2 GHz VCO
  • LMK04806BEVAL — Clock Jitter Cleaner With Dual Cascaded PLLs and Integrated 2.5 GHz VCO
  • LMK04816BEVAL — Three Input, Thirteen Output, Clock Jitter Cleaner with Dual Cascaded PLLs and Integrated 2.5 GHz VC
  • LMK04826BEVM — LMK04826BEVM Evaluation Module
  • LMK04828BEVM — LMK04828 evaluation module
  • LMK04832EVM — LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module
  • LMK04832SEPEVM — LMK04832-SEP evaluation module for ultra-low-noise, 3.2-GHz 15-output clock jitter clea
  • LMK04906BEVAL — Three Input, Seven Output, Clock Jitter Cleaner with Dual Cascaded PLLs and Integrated 2.5 GHz VCO
  • LMK5B33216EVM — LMK5B33216 evaluation module for 16-output, three DPLL and APLL, network synchronizer with BAW VCO
  • LMX2571EPEVM — LMX2571-EP evaluation module for 1.34-GHz, low-power, extreme-temperature RF synthesizer
  • LMX2582EVM — LMX2582EVM High Performance, Wideband Frequency PLLatinum RF Synthesizer With Integrated VCO
  • LMX2592EVM — LMX2592EVM high-performance, wideband frequency RF synthesizer PLLATINUM™ integrated circuit
  • LMX2594PSEVM — LMX2594 evaluation module for 15-GHz RF synthesizer with multiple-device phase synchronization
  • XMICR-3P-LMX2492 — LMX2492 X-MWblock evaluation modules
  • XMICR-3P-LMX2572 — LMX2572 X-MWblock evaluation modules
  • XMICR-3P-LMX2592 — LMX2592 X-MWblock evaluation modules
  • XMICR-3P-LMX2594 — LMX2594 X-MWblock evaluation modules
  • XMICR-3P-LMX2595 — LMX2595 X-MWblock evaluation modules
  • LMK04832EVM-CVAL — LMK04832-SP evaluation module for ultra-low-noise, dual-loop, JESD204B clock jitter cleaner
  • LMK04368EPEVM — LMK04368-EP evaluation module for JESD204B/C dual-loop clock jitter cleaner
  • LMK61E0MEVM — LMK61E0M Ultra-Low-Jitter Programmabler Oscillator Evaluation Module
  • LMK61E2EVM — LMK61E2EVM Ultra-Low-Jitter Programmable Oscillator Evaluation Module
  • LMX1204EVM — LMX1204 evaluation module for RF buffer, multiplier and divider with JESD204B/C SYSREF support
  • LMX2594EVM — LMX2594EVM 15-GHz wideband RF synthesizer with phase synchronization & JESD204B evaluation module
  • LMX2595EVM — 20-GHz Wideband RF Synthesizer With Phase Synchronization and JESD204B Evaluation Module
  • LMX2615EVM-CVAL — Space grade synthesizer evaluation module
  • LMX2694EPEVM — 15-GHz wideband RF synthesizer evaluation module
  • LMX2572EVM — 6.4-GHz Low Power Wideband RF Synthesizer with Phase Synchronization and JESD204B Support
  • LMX2572LPEVM — 2-GHz Low Power Wideband RF Synthesizer with FSK Modulation Evaluation Module
  • LMX2581EVM — LMX2581 evaluation module
  • LMX2820EVM — LMX2820 22.6-GHz wideband RF synthesizer evaluation module
  • LMX8410LEVM — I/Q demodulator evaluation module
  • LMK5B12212EVM — LMK5B12212 evaluation module
  • LMK5B33414EVM — LMK5B33414 evaluation module for 14-output, three DPLL and APLL, network synchronizer with BAW VCO
  • LMK5C33216AEVM — LMK5C33216A evaluation module
  • LMK5C33216EVM — LMK5C33216 clock synchronizer DPLL 2 input 16 outputs evaluation module
  • LMK5C33414AEVM — LMK5C33414A evaluation module
  • LMK05028EVM — LMK05028 Network Clock Generator and Synchronizer Evaluation Module
  • LMK05318BEVM — Network synchronizer clock evaluation module
  • CDCI6214EVM — CDCI6214 Ultra-Low Power Clock Generator Evaluation Module
  • CDCE6214-Q1EVM — 4 differential and 1 LVCMOS outputs clock generator evaluation module
  • LMK3H0102EVM — LMK3H0102 evaluation module
Software
IDE, configuration, compiler or debugger
  • CODELOADER — CodeLoader Software for device register programming
Download options
Simulation model

LMX1204 IBIS Model

SNAM255.ZIP (44 KB) - IBIS Model
Download
Design tool

CLOCK-TREE-ARCHITECT — Clock tree architect programming software

Clock tree architect is a clock tree synthesis tool that streamlines your design process by generating clock tree solutions based on your system requirements. The tool pulls data from an extensive database of clocking products to generate a system-level multi-chip clocking solution.
Design now
Design tool

PLLATINUMSIM-SW — PLLatinum Sim Tool

PLLATINUMSIM-SW is a simulation tool that allows users to create detailed designs and simulations of our PLLatinum™ integrated circuits, which include the LMX series of phase-locked loops (PLLs) and synthesizers.

Supported products & hardware

Supported products & hardware

Products
Clock buffers
  • CDCDB2000 — DB2000QL compliant 20-output clock buffer for PCIe® Gen 1 to Gen 7
  • CDCDB400 — 4-output clock buffer for PCIe® Gen 1 to Gen 7
  • CDCDB800 — 8-output clock buffer for PCIe® Gen 1 to Gen 7
  • CDCDB803 — 8-output clock buffer for PCIe® Gen 1 to Gen 6 with selectable SMBus addresses
  • CDCLVC1102 — Low jitter, 1:2 LVCMOS fan-out clock buffer
  • CDCLVC1103 — Low jitter, 1:3 LVCMOS fan-out clock buffer
  • CDCLVC1104 — Low jitter, 1:4 LVCMOS fan-out clock buffer
  • CDCLVC1106 — Low jitter, 1:6 LVCMOS fan-out clock buffer
  • CDCLVC1108 — Low jitter, 1:8 LVCMOS fan-out clock buffer
  • CDCLVC1110 — Low jitter, 1:10 LVCMOS fan-out clock buffer
  • CDCLVC1112 — Low jitter, 1:12 LVCMOS fan-out clock buffer
  • CDCLVC1310 — Universal input, 10-output low impedance LVCMOS buffer
  • CDCLVD110A — 1-to-10 LVDS clock buffer up to 1100-MHz with minimum skew for clock distribution
  • CDCLVD1204 — Low jitter, 2-input selectable 1:4 universal-to-LVDS buffer
  • CDCLVD1208 — Low jitter, 2-input selectable 1:8 universal-to-LVDS buffer
  • CDCLVD1212 — Low jitter, 2-input selectable 1:12 universal-to-LVDS buffer
  • CDCLVD1213 — Low jitter, 1:4 universal-to-LVDS buffer with selectable output divider
  • CDCLVD1216 — Low jitter, 2-input selectable 1:16 universal-to-LVDS buffer
  • CDCLVD2102 — Low jitter, dual 1:2 universal-to-LVDS buffer
  • CDCLVD2104 — Low jitter, dual 1:4 universal-to-LVDS buffer
  • CDCLVD2106 — Low jitter, dual 1:6 universal-to-LVDS buffer
  • CDCLVD2108 — Low jitter, dual 1:8 universal-to-LVDS buffer
  • CDCLVP110 — 1:10 LVPECL/HSTL to LVPECL clock driver
  • CDCLVP1102 — Low jitter 1:2 universal-to-LVPECL buffer
  • CDCLVP111 — 1:10 LVPECL buffer with selectable input
  • CDCLVP111-EP — HiRel, 1:10 LVPECL buffer with selectable input
  • CDCLVP111-SEP — Radiation-tolerant 1:10 LVPECL high-speed clock buffer with selectable input clock driver
  • CDCLVP111-SP — 1:10 high speed clock buffer with selectable input clock driver
  • CDCLVP1204 — Low-jitter, two-input, selectable 1:4 universal-to-LVPECL buffer
  • CDCLVP1208 — Low jitter, 2-input selectable 1:8 universal-to-LVPECL buffer
  • CDCLVP1212 — Low jitter, 2-input selectable 1:12 universal-to-LVPECL buffer
  • CDCLVP1216 — Low jitter, 2-input selectable 1:16 universal-to-LVPECL buffer
  • CDCLVP2102 — Low jitter, dual 1:2 universal-to-LVPECL buffer
  • CDCLVP2104 — Low jitter, dual 1:4 universal-to-LVPECL buffer
  • CDCLVP2106 — Low jitter, dual 1:6 universal-to-LVPECL buffer
  • CDCLVP2108 — Low jitter, dual 1:8 universal-to-LVPECL buffer
  • CDCLVP215 — Dual 1:5 high speed LVPECL fan out buffer
  • LMK00301 — 3-GHz, 10-output differential fanout buffer / level translator
  • LMK00304 — 3.1-GHz differential clock buffer/level translator with 4 configurable outputs
  • LMK00306 — 3.1-GHz differential clock buffer/level translator with 6 configurable outputs
  • LMK00308 — 3.1-GHz differential clock buffer/level translator with 8 configurable outputs
  • LMK00334 — 4-output PCIe® Gen 1 to Gen 7 clock buffer and level translator
  • LMK00334-Q1 — Automotive 4-output PCIe® Gen1/Gen2/Gen3/Gen4/Gen5 clock buffer and level translator
  • LMK00338 — 8-output PCIe® Gen 1 to Gen 7 clock buffer and level translator
  • LMK1C1102 — 2-channel output LVCMOS 1.8-V buffer
  • LMK1C1102A — 1.8V,2.5V or 3.3V asynchronous 2 channel output LVCMOS buffer
  • LMK1C1103 — 3-channel output LVCMOS 1.8-V buffer
  • LMK1C1103A — 1.8V,2.5V or 3.3V asynchronous 3 channel output LVCMOS buffer
  • LMK1C1104 — 4-channel output LVCMOS 1.8-V buffer
  • LMK1C1104A — 1.8V,2.5V or 3.3V asynchronous 4 channel output LVCMOS buffer
  • LMK1C1106 — 6-channel output LVCMOS 1.8-V buffer
  • LMK1C1106A — 1.8V,2.5V or 3.3V asynchronous 6 channel output LVCMOS buffer
  • LMK1C1108 — 8-channel output LVCMOS 1.8-V buffer
  • LMK1C1108A — 1.8V,2.5V or 3.3V asynchronous 8 channel output LVCMOS buffer
  • LMK1D1204 — 4-channel output LVDS 1.8-V buffer
  • LMK1D1204P — 4-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer with pin control
  • LMK1D1208 — 8-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer
  • LMK1D1208I — 8-channel output, 1.8-V, 2.5-V, and 3.3-V LVDS buffer with I²C
  • LMK1D1208P — 8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer with pin control
  • LMK1D1212 — 12-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer
  • LMK1D1216 — 16-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer
  • LMK1D2102 — Dual bank 2-channel output LVDS 1.8-V, 2.5-V, and 3.3-V buffer
  • LMK1D2102L — Low additive jitter LVDS buffer
  • LMK1D2104 — Dual bank 4-channel output 1.8V, 2.5V and 3.3V LVDS buffer
  • LMK1D2104L — Dual bank 4-channel output LVDS 1.8V, 2.5V, and 3.3V buffer with 0.7V output common mode option
  • LMK1D2106 — Dual bank 6-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer
  • LMK1D2106L — Dual bank 2-channel output LVDS 1.8V, 2.5V and 3.3V buffer with 0.7V output common mode option
  • LMK1D2108 — Dual bank 8-channel output 1.8-V, 2.5-V, and 3.3-V LVDS buffer
Clock generators
  • LMK03318 — Ultra-low jitter clock generator family with single PLL
  • LMK03328 — Ultra-low jitter clock generator family with two independent PLLs
  • LMK03806 — Ultra-low jitter clock generator with 14 outputs
Clock jitter cleaners
  • LMK04208 — Ultra low-noise clock jitter cleaner with 6 programmable outputs
  • LMK04368-EP — Enhanced product ultra-low-noise 3.2-GHz JESD204C jitter cleaner
  • LMK04714-Q1 — Automotive, ultra low-noise 3.2-GHz, JESD204B and JESD204C dual-loop clock jitter cleaner
  • LMK04803 — Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 1.9-GHz VCO
  • LMK04805 — Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 2.2-GHz VCO
  • LMK04806 — Low-noise clock jitter cleaner with dual cascaded PLLs and integrated 2.5-GHz VCO
  • LMK04808 — Low-noise clock jitter cleaner with dual loop PLLs and integrated 2.9-GHz VCO
  • LMK04816 — Three input low-noise clock jitter cleaner with dual loop PLLs
  • LMK04821 — Ultra low jitter synthesizer and jitter cleaner with JESD204B support
  • LMK04826 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 1840 to1970-MHz VCO0
  • LMK04828 — Ultra low-noise JESD204B compliant clock jitter cleaner with integrated 2370 to 2630-MHz VCO0.
  • LMK04828-EP — Ultra low-noise JESD204B compliant clock jitter cleaner with temperature range -55 to 105c
  • LMK04832 — Ultra-low-noise, 3.2-GHz, 15-output, JESD204B clock jitter cleaner with dual loop
  • LMK04832-SEP — Radiation-tolerant, 30-krad, ultra-low-noise, 3.2-GHz 15-output JESD204C clock jitter cleaner
  • LMK04832-SP — Radiation-hardened-assured (RHA), ultra-low-noise, 3.2-GHz, 15-output clock jitter cleaner
  • LMK04906 — Ultra low noise clock jitter cleaner/multiplier with 6 programmable outputs
Clock network synchronizers
  • LMK05028 — Low-jitter dual-channel network synchronizer clock
  • LMK05318 — Ultra-low jitter single channel network synchronizer clock with BAW
  • LMK05318B — Ultra-low jitter single channel network synchronizer clock with BAW
  • LMK05318B-Q1 — Automotive ultra-low jitter network synchronizer and clock generator
  • LMK5B33216 — 16-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO
  • LMK5B33414 — 14-output, three DPLL and APLL, network synchronizer with integrated 2.5-GHz bulk-acoustic-wave VCO
  • LMK5C33216 — Ultra-low jitter clock synchronizer with JESD204B for wireless communications with BAW
  • LMK5C33216A — Three DPLL, three APLL, two-input and 16-output network synchronizer with JESD204B/C and BAW VCO
RF PLLs & synthesizers
  • LMX1204 — 12.8-GHz RF buffer, multiplier and divider with JESD204B/C SYSREF support and phase synchronization
  • LMX1214 — 1:5 18GHz RF buffer and divider with auxiliary clock
  • LMX1906-SP — Radiation-hardness-assured (RHA) 15GHz buffer, multiplier and divider with SYSREF and FPGA clock
  • LMX2430 — 3.0-GHz/0.8-GHz PLLatinum dual high frequency synthesizer for RF personal communications
  • LMX2433 — 3.6-GHz/1.7-GHz PLLatinum dual high frequency synthesizer for RF personal communications
  • LMX2434 — 5.0-GHz/2.5-GHz PLLatinum low power dual frequency synthesizer for RF personal communications
  • LMX2470 — 2.6-GHz delta-sigma fractional-N PLL with 800-MHz integer-N PLL
  • LMX2485 — 500-MHz to 3-GHz delta-sigma low power dual PLL for RF personal communications
  • LMX2485E — 50-MHz to 3-GHz delta-sigma low power dual PLL for RF personal communications
  • LMX2485Q-Q1 — 500MHz to 3GHz automotive delta-sigma low power dual PLL
  • LMX2486 — 1-GHz to 4.5-GHz delta-sigma low power dual PLL for RF personal communications
  • LMX2487 — 1 to 6-GHz delta-sigma low power dual PLLatinum frequency synthesizer with 3.0-GHz integer PLL
  • LMX2487E — 3-GHz to 7.5-GHz delta-sigma low power dual PLL for RF personal communications
  • LMX2491 — 6.4-GHz low noise fractional-N PLL with ramp/chirp generation
  • LMX2492 — 500MHz to 14GHz wideband, low noise fractional-N PLL with ramp/chirp generation
  • LMX2492-Q1 — Automotive grade 500-MHz to 14-GHz wideband, low noise fractional-N PLL with ramp/chirp generation
  • LMX2531 — High performance frequency synthesizer system with integrated VCO
  • LMX2541 — Ultra-low noise PLLatinum frequency synthesizer with integrated VCO
  • LMX2571 — 1.34-GHz, low-power, extreme-temperature RF synthesizer with frequency-shift keying (FSK) modulation
  • LMX2571-EP — Enhanced-product, 1.34-GHz, low-power, extreme-temperature RF synthesizer with FSK modulation
  • LMX2572 — 6.4-GHz low-power wideband RF synthesizer
  • LMX2572LP — 2-GHz low power wideband RF synthesizer with FSK modulation
  • LMX2581 — 3.76-GHz wideband frequency synthesizer with integrated VCO
  • LMX2581E — 3.8-GHz wideband frequency synthesizer with integrated VCO
  • LMX2582 — 5.5-GHz high performance, wideband PLLatinum RF synthesizer
  • LMX2592 — 9.8-GHz wideband frequency synthesizer with integrated VCO
  • LMX2594 — 15-GHz wideband PLLatinum™ RF synthesizer with phase synchronization and JESD204B support
  • LMX2595 — 20-GHz wideband RF synthesizer with phase synchronization & JESD204B support
  • LMX2615-SP — Space grade 40-MHz to 15-GHz wideband synthesizer with phase synchronization and JESD204B support
  • LMX2694-EP — Enhanced product 15-GHz RF synthesizer with phase synchronization
  • TRF3765 — 300M-4800MHz Low Noise Integer-N/Fractional-N PLL with Integrated VCO and up to 8 Outputs
IQ demodulators
  • LMX8410L — High-Performance Mixer With Integrated Synthesizer
Hardware development
Evaluation board
  • LMK04832EVM — LMK04832 JESD204B Clock Jitter Cleaner/Clock Generator/Distribution Evaluation Module
  • LMX2571EPEVM — LMX2571-EP evaluation module for 1.34-GHz, low-power, extreme-temperature RF synthesizer
  • LMX2594PSEVM — LMX2594 evaluation module for 15-GHz RF synthesizer with multiple-device phase synchronization
  • XMICR-3P-LMX2492 — LMX2492 X-MWblock evaluation modules
  • XMICR-3P-LMX2572 — LMX2572 X-MWblock evaluation modules
  • XMICR-3P-LMX2592 — LMX2592 X-MWblock evaluation modules
  • XMICR-3P-LMX2594 — LMX2594 X-MWblock evaluation modules
  • XMICR-3P-LMX2595 — LMX2595 X-MWblock evaluation modules
Software
Application software & framework
  • TICSPRO-SW — Texas Instruments Clocks and Synthesizers (TICS) Pro Software
IDE, configuration, compiler or debugger
  • CODELOADER — CodeLoader Software for device register programming
Support software
  • LMX9830-SW — LMX9830 Application Notes, Software, and Tools
  • LMX9838-SW — LMX9838 Application Notes, Software, and Tools
Download options
Reference designs

TIDA-010259 — Cascaded LMX1204 reference design

The cascaded LMX1204 Reference Design distributes a single clock input to 16 clock outputs.  It is suitable for high frequency operation up to 12.8 GHz with negligible phase noise impact to the clock signal.  It is ideally suitable for clocking high speed data converters in large phased (...)
Design guide: PDF
Package Pins CAD symbols, footprints & 3D models
VQFN (RHA) 40 Ultra Librarian
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