This reference design provides a template for implementing gate drive designs for field effect transistors (FETs) rated up to 3.3kV. By utilizing single-channel isolated pre-drivers with split outputs, multiple variants of power FETs can be driven while maintaining high current sink and source capability. The performance of the driving design is further enhanced by incorporating a DC/DC isolated bias supply with controlled output rail voltages, enabling lower RDS(on) operation.
| Output voltage options | TIDA-011011.1 |
|---|---|
| Vin (Min) (V) | 10.8 |
| Vin (Max) (V) | 13.2 |
| Vout (Nom) (V) | 18 |
| Iout (Max) (A) | .1 |
| Output Power (W) | 1.8 |
| Isolated/Non-Isolated | Isolated |
| Input Type | DC |
| Topology | Other |
A fully assembled board has been developed for testing and performance validation only, and is not available for sale.
Download ready-to-use system files to speed your design process.
Reference design overview and verified performance test data
Detailed overview of design layout for component placement
Complete listing of design components, reference designators, and manufacturers/part numbers
Files used for 3D models or 2D drawings of IC components
Design file that contains information on physical board layer of design PCB
PCB layer plot file used for generating PCB design layout
Detailed schematic diagram for design layout and components
Includes TI products in the design and potential alternatives.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Design guide | Isolated Gate Driver Board With Isolated Bias Supply for 3.3kV SiC-FET Reference Design | PDF | HTML | Mar 20, 2026 |
Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.
If you have questions about quality, packaging or ordering TI products, see TI support.