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DDR-CONFIG-AM62A

DDR Configuration Tool

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Latest version
Version: 0.10.10
Release date: 20 Dec 2024
open-in-new

Release notes

Products
Arm-based processors
AM62A3 — 1 TOPS vision SoC with RGB-IR ISP for 1-2 cameras, low-power, video surveillance, retail automation AM62A3-Q1 — Automotive 1 TOPS vision SoC with RGB-IR ISP for 1-2 cameras, driver monitoring, dashcams AM62A7 — 2 TOPS vision SoC with RGB-IR ISP for 1-2 cameras, low-power systems, machine vision, robotics AM62A7-Q1 — 2 TOPS vision SoC with RGB-IR ISP for 1-2 cameras, driver monitoring, front cameras
Hardware development
Evaluation board
SK-AM62A-LP — AM62A starter kit for low-power Sitara™ processors

Release Information

This tool is intended to simplify the process of configuring the DDR Subsystem Controller and PHY to interface with DRAM memory devices.

What's new

  • fixed errata associated with CA VREF training range
  • restricted some inputs for FSP1 and IO configurations
  • removed parameter tDQSCKmin from DDR4. Not used
  • added support for AM62Dx