SLVUCU5 December   2025 UCD91160 , UCD91320

1.   1
2.   Abstract
3.   Trademarks
4. 1 Power Supply Sequencing
   1. 1.1 Overview
   2. 1.2 Rail On and Off Configuration
   3. 1.3 Rail Power Good
   4. 1.4 Rail Sequence Configuration
   5. 1.5 Rail States
   6. 1.6 Rail Sequencing Example Use Cases
5. 2 GPIOs
   1. 2.1 Overview
   2. 2.2 Command Controlled GPOs
   3. 2.3 Logic GPOs
      1. 2.3.1 Boolean Logic Builder
   4. 2.4 GPIs
      1. 2.4.1 GPI Special Functionality
      2. 2.4.2 GPI Fault Responses
      3. 2.4.3 GPI Latched Status Clearing
      4. 2.4.4 GPI Debug Pin
      5. 2.4.5 GPI Fault Pin
   5. 2.5 Power Supply Enable Pins
   6. 2.6 Cascading Pins
   7. 2.7 Margining Pins
6. 3 GPI State Machine
   1. 3.1 Overview
   2. 3.2 GPI State Machine Configuration
7. 4 Monitoring
8. 5 Rail Profiles
9. 6 Margining
   1. 6.1 Overview
   2. 6.2 Operation
   3. 6.3 Idle Behavior of Margining Pins
10. 7 Cascading
    1. 7.1 Overview
    2. 7.2 Power On Cascading
    3. 7.3 Power On and Off Cascading
    4. 7.4 Fault Cascading
    5. 7.5 Cascading Requirements
11. 8 Fault Handling
12. 9 Fault Logging
13. 10Memory
    1. 10.1 Overview
    2. 10.2 Flash Memory
    3. 10.3 Power Up
    4. 10.4 Program Lifetime
14. 11Internal Fault Management
15. 12Status Monitoring
16. 13Device Reset
17. 14ADC Reference
18. 15System Watchdog
19. 16System Reset
20. 17PMBus Specification
    1. 17.1 Manufacturer Specific Status (STATUS_MFR_SPECIFIC)
21. 18Data Formats
    1. 18.1 Data Format for Output Voltage Parameters
    2. 18.2 Data Format for Other Parameters
    3. 18.3 Distinguishing Between Linear Data Formats
    4. 18.4 Translation, Quantization, and Truncation
    5. 18.5 8-Bit Time Encoding
    6. 18.6 16-Bit Time Encoding
22. 19Memory Model
23. 20Alert Response Address Support
24. 21Supported PMBus Commands
25. 22Implementation Details for PMBus Core Commands
    1. 22.1  (00h) PAGE
    2. 22.2  (01h) OPERATION
    3. 22.3  (0Eh) PASSKEY
    4. 22.4  (0Fh) ACCESS_CONTROL
    5. 22.5  (11h) STORE_DEFAULT_ALL
    6. 22.6  (12h) RESTORE_DEFAULT_ALL
    7. 22.7  (1Bh) SMBALERT_MASK
    8. 22.8  (20h) VOUT_MODE
    9. 22.9  (38h) IOUT_CAL_GAIN
    10. 22.10 (41h – 69h) xxx_FAULT_RESPONSE
    11. 22.11 (62h) TON_MAX_FAULT_LIMIT
    12. 22.12 (66h) TOFF_MAX_WARN_LIMIT
    13. 22.13 (80h) STATUS_MFR_SPECIFIC
    14. 22.14 (8Dh) READ_TEMPERATURE_1
    15. 22.15 (8Eh) READ_TEMPERATURE_2
    16. 22.16 (ADh) IC_DEVICE_ID
    17. 22.17 (AEh) IC_DEVICE_REV
26. 23Input and Output Pin Configuration
27. 24PWM Configuration
28. 25Implementation Details for User Data Commands
    1. 25.1 (B5h) FIRST_BLACK_BOX_FAULT_INFO (USER_DATA_05)
    2. 25.2 (B6h) LAST_BLACK_BOX_FAULT_INFO Command Format(USER_DATA_06)
    3. 25.3 (B8h) RAIL_PROFILE (USER_DATA_08)
       1. 25.3.1 Number Profile
       2. 25.3.2 Profile Index
    4. 25.4 (B9h) RAIL_STATE (USER_DATA_09)
29. 26Implementation Details for Manufacturer-Specific Commands
    1. 26.1  Manufacturer-Specific Commands Notice
    2. 26.2  (D0h) FAULT_PIN_CONFIG (MFR_SPECIFIC_00)
       1. 26.2.1 Fault Pin Configuration
       2. 26.2.2 Page Mask
       3. 26.2.3 GPI Mask
       4. 26.2.4 Other Mask
    3. 26.3  (D1h) VOUT_CAL_MONITOR (MFR_SPECIFIC_01)
    4. 26.4  (D2h) SYSTEM_RESET_CONFIG (MFR_SPECIFIC_02)
       1. 26.4.1 GPI Flags
       2. 26.4.2 Page Flags
       3. 26.4.3 Deassert When Power-Good
       4. 26.4.4 Assert When NOT Power-Good
       5. 26.4.5 Assert When Watchdog Timeout
       6. 26.4.6 Delay Time
       7. 26.4.7 Pulse Time
       8. 26.4.8 GPI Tracking
       9. 26.4.9 Reset Pin Configuration
    5. 26.5  (D3h) SYSTEM_WATCHDOG_CONFIG (MFR_SPECIFIC_03)
       1. 26.5.1 Enable
       2. 26.5.2 Watch Reset Pin
       3. 26.5.3 Disable Until System Reset Release
       4. 26.5.4 Start Time
       5. 26.5.5 Input Pin (WDI) Configuration
       6. 26.5.6 Reset Period
       7. 26.5.7 Output Pin (WDO) Configuration
    6. 26.6  (D4h) SYSTEM_WATCHDOG_RESET (MFR_SPECIFIC_04)
    7. 26.7  (D5h) MONITOR_CONFIG (MFR_SPECIFIC_05)
    8. 26.8  (D6h) NUM_PAGES (MFR_SPECIFIC_06)
    9. 26.9  (D7h) RUN_TIME_CLOCK (MFR_SPECIFIC_07)
    10. 26.10 (D8h) RUN_TIME_CLOCK_TRIM (MFR_SPECIFIC_08)
    11. 26.11 (DAh) USER_RAM_00 (MFR_SPECIFIC_10)
    12. 26.12 (DBh) SOFT_RESET (MFR_SPECIFIC_11)
    13. 26.13 (DCh) RESET_COUNT (MFR_SPECIFIC_12)
    14. 26.14 (DDh) PIN_SELECTED_RAIL_STATES (MFR_SPECIFIC_13)
        1. 26.14.1 System State Enables
        2. 26.14.2 Soft Off Enables
        3. 26.14.3 System State
    15. 26.15 (DEh) RESEQUENCE (MFR_SPECIFIC_14)
    16. 26.16 (DFh) CONSTANTS (MFR_SPECIFIC_15)
    17. 26.17 (E0h) PWM_SELECT (MFR_SPECIFIC_16)
    18. 26.18 (E1h) PWM_CONFIG (MFR_SPECIFIC_17)
    19. 26.19 (E2h) PARM_INFO (MFR_SPECIFIC_18)
    20. 26.20 (E3h) PARM_VALUE (MFR_SPECIFIC_19)
    21. 26.21 (E4h) TEMPERATURE_CAL_GAIN (MFR_SPECIFIC_20)
    22. 26.22 (E5h) TEMPERATURE_CAL_OFFSET (MFR_SPECIFIC_21)
    23. 26.23 (E6h) SET_BREAKPOINTS (MFR_SPECIFIC 22)
    24. 26.24 (E7h) DEBUG_CONTINUE (MFR_SPECIFIC_23)
    25. 26.25 (E9h) FAULT_RESPONSES (MFR_SPECIFIC_25)
        1. 26.25.1 Fault Response Bytes
        2. 26.25.2 Re-Sequence
        3. 26.25.3 Time Between Retries
        4. 26.25.4 Maximum Glitch Time for Voltage Faults
        5. 26.25.5 Maximum Glitch Time for Non-Voltage Faults
    26. 26.26 (EAh) LOGGED_FAULTS (MFR_SPECIFIC_26)
        1. 26.26.1 Command Format
        2. 26.26.2 Non-Paged Faults
        3. 26.26.3 GPI Faults
        4. 26.26.4 Page-Dependent Faults
    27. 26.27 (EBh) LOGGED_FAULT_DETAIL_INDEX (MFR_SPECIFIC_27)
    28. 26.28 (ECh) LOGGED_FAULT_DETAIL (MFR_SPECIFIC_28)
    29. 26.29 (EFh) LOG_FAULT_DETAIL_ENABLES (MFR_SPECIFIC_31)
    30. 26.30 (F0h) EXECUTE_FLASH (MFR_SPECIFIC_32)
    31. 26.31 (F1h) SECURITY (MFR_SPECIFIC_33)
    32. 26.32 F2h) SECURITY_BIT_MASK (MFR_SPECIFIC_34)
    33. 26.33 (F3h) MFR_STATUS (MFR_SPECIFIC_35)
    34. 26.34 (F4h) GPI_FAULT_RESPONSES (MFR_SPECIFIC_36)
        1. 26.34.1 Fault Responses Byte
        2. 26.34.2 Time Between Retries
        3. 26.34.3 Maximum Glitch Time for GPI
        4. 26.34.4 GPI Number Rail Profile Pin Selection
        5. 26.34.5 Block Out Period for Profile
    35. 26.35 (F5h) MARGIN_CONFIG (MFR_SPECIFIC_37)
    36. 26.36 (F6h) SEQ_CONFIG (MFR_SPECIFIC_38)
        1. 26.36.1  Enable Pin Configuration
        2. 26.36.2  GPI Sequence On Dependency Mask
        3. 26.36.3  GPI Sequence Off Dependency Mask
        4. 26.36.4  Sequencing Timeout Configuration
        5. 26.36.5  Sequencing On Timeout
        6. 26.36.6  Sequencing Off Timeout
        7. 26.36.7  Page Sequence On Dependency Mask
        8. 26.36.8  Page Sequence Off Dependency Mask
        9. 26.36.9  Fault Slaves Mask
        10. 26.36.10 GPO Sequence On Dependency Mask
        11. 26.36.11 GPO Sequence Off Dependency Mask
    37. 26.37 (F7h) GPO_CONFIG_INDEX (MFR_SPECIFIC_39)
    38. 26.38 (F8h) GPO_CONFIG (MFR_SPECIFIC_40)
        1. 26.38.1  Output Pin Configuration
        2. 26.38.2  Assert Delay Enable
        3. 26.38.3  Deassert Delay Enable
        4. 26.38.4  Invert OR Output
        5. 26.38.5  Ignore Inputs During Delay
        6. 26.38.6  Invert AND Output
        7. 26.38.7  State Machine Mode Enable
        8. 26.38.8  High Resolution Delay Count
        9. 26.38.9  Millisecond Delay
        10. 26.38.10 Status Mask
        11. 26.38.11 Status Inversion Mask
        12. 26.38.12 GPI Mask
        13. 26.38.13 GPI Inversion Mask
        14. 26.38.14 GPO Mask
        15. 26.38.15 GPO Inversion Mask
        16. 26.38.16 Status Type Select
        17. 26.38.17 GPO Configuration Examples
    39. 26.39 (F9h) GPI_CONFIG (MFR_SPECIFIC_41)
        1. 26.39.1 GPI Pin Configuration
        2. 26.39.2 Fault Enable Flags
        3. 26.39.3 Latched Statuses Clear Pin Selection
        4. 26.39.4 MRG_EN Pin Selection
        5. 26.39.5 MRG_LOW_nHIGH Pin Selection
        6. 26.39.6 Maximum Glitch Time for Fault Pin
        7. 26.39.7 GPI Debug Mode Pin Selection
    40. 26.40 (FAh) GPIO_SELECT (MFR_SPECIFIC_42)
    41. 26.41 (FBh) GPIO_CONFIG (MFR_SPECIFIC_43)
    42. 26.42 (FCh) MISC_CONFIG (MFR_SPECIFIC_44)
        1. 26.42.1 Miscellaneous Configuration Byte
        2. 26.42.2 Time Between Resequences
        3. 26.42.3 External Reference Voltage
        4. 26.42.4 Resequence_rails_mask
    43. 26.43 (FDh) DEVICE_ID (MFR_SPECIFIC_45)
30. 27Range Checking and Limits
31. 28Glossary
32. 29Revision History

UCD91xxx Sequencer and System Health Controller PMBus Command Reference