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AFE79xx SPI Bringup Guide With Xilinx FPGAs
SBAU412A
November 2022 – May 2024
AFE7900
,
AFE7903
,
AFE7906
,
AFE7920
,
AFE7921
,
AFE7950
CONTENTS
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AFE79xx SPI Bringup Guide With Xilinx FPGAs
1
Abstract
Trademarks
1
Introduction
2
Prerequisites
3
Typical Bare-Metal Design Flow
4
Background
5
Add Microblaze and SPI IP for Use in Vitis for Embedded Development
6
Create New Platforms in Vitis
7
Create New Application Projects in Vitis
8
Build Application Projects
9
Generate SPI Log for AFE79xx EVM
9.1
Generating the LMK SPI Log
9.2
Generating the AFE SPI Log
9.3
Converting SPI Logs to Format for Vitis
10
AFE79xxEVM Board Modifications
11
Configure the AXI GPIO
11.1
Initializing the GPIO
11.2
Setting the Direction
11.3
Setting High or Low for Corresponding Bits
12
Configure the AXI SPI
13
Set Up and Power on Hardware
14
Set up ZCU102 Board Interface for VADJ_FMC
15
Debug Application Projects and Set up Vitis Serial Terminal
16
Execute the Application
17
Revision History
IMPORTANT NOTICE
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AFE79xx SPI Bringup Guide With Xilinx FPGAs