The 12-bit, 3.6 GSPS ADC12D1800 is the latest advance in TI’s Ultra-High-Speed ADC family and builds upon the features, architecture and functionality of the 10-bit GHz family of ADCs.
The ADC12D1800 provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common mode voltage.
The product is packaged in a leaded or lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of –40°C to +85°C.
To achieve full rated performance for fCLK > 1.6 GHz, write the maximum power settings one time to Register 6h through the serial interface; see Section 5.6.1 for more information.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | ADC12D1800 12-Bit, Single 3.6 GSPS Ultra High-Speed ADC datasheet (Rev. Q) | PDF | HTML | 17 May 2017 |
| Application note | AN-2132 Synchronizing Multiple GSPS ADCs in a System: The AutoSync Feature (Rev. G) | 03 Feb 2017 | ||
| Application note | Maximizing SFDR Performance in the GSPS ADC: Spur Sources and Methods of Mitigat | 09 Dec 2013 | ||
| Application note | AN-2128 ADC1xD1x00 Pin Compatibility (Rev. C) | 01 May 2013 | ||
| User guide | Schematic and Layout Recommendations for the GSPS ADC | 29 Apr 2013 | ||
| Application note | AN-2177 Using the LMH6554 as a ADC Driver (Rev. A) | 26 Apr 2013 | ||
| Application note | From Sample Instant to Data Output: Understanding Latency in the GSPS ADC | 18 Dec 2012 | ||
| Product overview | ADC12D1x00 12-bit ADC Family: Ultra High-Speed 12-bit ADCs up to 3.6 GSPS | 16 May 2012 | ||
| User guide | 12-Bit, Dual 1.6/1.8 GSPS or Single 3.2/3.6 GSPS Ref Bd User Guide | 25 Jan 2012 |
For additional terms or required resources, click any title below to view the detail page where available.
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| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| PBGA (NXA) | 292 | Ultra Librarian |
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