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DS90UB941AS-Q1

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2K DSI to FPD-Link III Serializer

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Data sheet

DS90UB941AS-Q1

ACTIVE
Data sheet Order now

Product details

Applications In-vehicle Infotainment (IVI) Input compatibility MIPI DSI Function Serializer Output compatibility FPD-Link III LVDS Color depth (bpp) 24 Features Low-EMI Point-to-Point Communication Signal conditioning Adaptive Equalizer EMI reduction BIST Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105 TI functional safety category Functional Safety-Capable
Applications In-vehicle Infotainment (IVI) Input compatibility MIPI DSI Function Serializer Output compatibility FPD-Link III LVDS Color depth (bpp) 24 Features Low-EMI Point-to-Point Communication Signal conditioning Adaptive Equalizer EMI reduction BIST Diagnostics BIST Rating Automotive Operating temperature range (°C) -40 to 105 TI functional safety category Functional Safety-Capable
VQFNP (RTD) 64 81 mm² 9 x 9
  • AEC-Q100 qualified for automotive applications with the following results:
    • Device temperature grade 2: −40℃ to +105℃ ambient operating temperature
  • Supports pixel clock frequency up to 210 MHz for 3K (2880x1620) at 30Hz, QXGA (2048x1536), 2K (2880x1080), WUXGA (1920x1200), or 1080p60 (1920x1080) resolutions with 24-bit color depth
  • MIPI D-PHY / Display Serial Interface (DSI) receiver provides a high-bandwidth interface to video processor or FPGA
    • Dual DSI input ports with up to 4 data lanes each
    • Up to 1.5 Gbps per lane
    • Superframe with symmetric and asymmetric unpacking capability
    • ECC and CRC generation
    • Virtual channel capability
  • Single and dual FPD-Link III outputs
    • Single link: up to 105MHz pixel clock
    • Dual link: up to 210MHz pixel clock

  • Functional Safety-Capable

    • Documentation available to aid ISO 26262 system design

  • Symmetric and asymmetric video splitting
  • AEC-Q100 qualified for automotive applications with the following results:
    • Device temperature grade 2: −40℃ to +105℃ ambient operating temperature
  • Supports pixel clock frequency up to 210 MHz for 3K (2880x1620) at 30Hz, QXGA (2048x1536), 2K (2880x1080), WUXGA (1920x1200), or 1080p60 (1920x1080) resolutions with 24-bit color depth
  • MIPI D-PHY / Display Serial Interface (DSI) receiver provides a high-bandwidth interface to video processor or FPGA
    • Dual DSI input ports with up to 4 data lanes each
    • Up to 1.5 Gbps per lane
    • Superframe with symmetric and asymmetric unpacking capability
    • ECC and CRC generation
    • Virtual channel capability
  • Single and dual FPD-Link III outputs
    • Single link: up to 105MHz pixel clock
    • Dual link: up to 210MHz pixel clock

  • Functional Safety-Capable

    • Documentation available to aid ISO 26262 system design

  • Symmetric and asymmetric video splitting

The DS90UB941AS-Q1 is a dual DSI to FPD-Link III bridge serializer designed for automotive infotainment applications. When paired with an FPD-Link III DS90UB940N-Q1, DS90UB948-Q1, DS90UB924-Q1, DS90UB926Q-Q1 or DS90UB928Q-Q1 deserializer, the DS90UB941AS-Q1 can supply 1- or 2-lane high-speed serial streams over cost-effective, 50 Ω, single-ended coaxial cables or over 100 Ω, differential shielded twisted-pair (STP) and shielded twisted-quad (STQ) cables. In response to the rise in number and variance of displays in infotainment systems, the DS90UB941AS-Q1 can support symmetric and asymmetric splitting.

The DS90UB941AS-Q1 can consolidate video data over two differential pairs to simplify system design and decrease the interconnect size and weight of the application.

The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C communication and up to eight I2S audio channels over the same high-speed serial link. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization.

The DS90UB941AS-Q1 is a dual DSI to FPD-Link III bridge serializer designed for automotive infotainment applications. When paired with an FPD-Link III DS90UB940N-Q1, DS90UB948-Q1, DS90UB924-Q1, DS90UB926Q-Q1 or DS90UB928Q-Q1 deserializer, the DS90UB941AS-Q1 can supply 1- or 2-lane high-speed serial streams over cost-effective, 50 Ω, single-ended coaxial cables or over 100 Ω, differential shielded twisted-pair (STP) and shielded twisted-quad (STQ) cables. In response to the rise in number and variance of displays in infotainment systems, the DS90UB941AS-Q1 can support symmetric and asymmetric splitting.

The DS90UB941AS-Q1 can consolidate video data over two differential pairs to simplify system design and decrease the interconnect size and weight of the application.

The FPD-Link III interface supports video and audio data transmission and full duplex control, including I2C communication and up to eight I2S audio channels over the same high-speed serial link. EMI is minimized by the use of low voltage differential signaling, data scrambling, and randomization.
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Technical documentation

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* Data sheet DS90UB941AS-Q1 DSI to FPD-Link III Bridge Serializer datasheet (Rev. C) 01 Feb 2021
Application note Exploring the Int Test Pattern Generation Feature of FPD-Link III IVI Devices (Rev. G) PDF | HTML 03 Nov 2020
Application note Splitter Mode Operations With the DS90Ux941ASQ1 (Rev. A) PDF | HTML 27 Oct 2020
Application note DS90UB941AS-Q1 DSI Bringup Guide PDF | HTML 31 Jul 2020
Technical article 3 ways to drive multiple displays in an integrated digital cockpit with FPD-Link I PDF | HTML 02 Oct 2019
Analog Design Journal An EMC/EMI system-design and testing methodology for FPD-Link III SerDes 26 Apr 2017
Analog Design Journal Ten tips for successfully designing with automotive EMC/EMI requirements 24 Jul 2015

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DS90UB941AS-Q1EVM — DSI to FPD-Link III bridge serializer evaluation module

The DS90Ux941AS-Q1 evaluation module (EVM) converts DSI to FPD-Link III. This kit will demonstrate the functionality and operation of the DS90Ux941AS-Q1. The DS90Ux941AS-Q1 is a DSI to FPD-Link III serializer which, in conjunction with the DS90Ux940N-1/DS90Ux948-1 deserializers, takes the data (...)
User guide: PDF
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Application software & framework

ALP — Analog LaunchPad Framework Utility

Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:

  • Local and remote device access
  • (...)
Supported products & hardware

Supported products & hardware
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Support software

ALP-PROFILE-UPDATE — Analog LaunchPad Profile Update Software

Analog LaunchPad (ALP) software is an interactive graphical user interface (GUI) software platform to evaluate TI FPD-Link™ serializers and deserializers (SerDes). ALP software enables device- and system-level evaluation with powerful built-in features, including:

  • Local and remote device access
  • (...)
Supported products & hardware

Supported products & hardware
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Simulation model

DS90UB941AS-Q1 IBIS Model (Rev. B)

SNLM227B.ZIP (93 KB) - IBIS Model
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Gerber file

DS90Ux941AS-Q1 Superframe Design Calculator

SNLC064.ZIP (52 KB)
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Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Simulation tool

TINA-TI — SPICE-based analog simulation program

TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
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Reference designs

TIDEP-01020 — Automotive domain controller for gateway, assisted and automated driving systems reference design

Decentralized vehicle architectures on the road today use individual ECUs that lack processing power and high-speed interfaces to handle the complex tasks and data movement needs of newly emerging automotive architectures. Higher level functions require the right combination of DMIPS, data (...)
Design guide: PDF
Schematic: PDF
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