The SNx4AHC138 decoders/demultiplexers are designed for high-performance memory-decoding and data-routing applications that require very short propagation-delay times. In high-performance memory systems, these decoders can be used to minimize the effects of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than the typical access time of the memory. This means that the effective system delay introduced by the decoders is negligible.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | SNx4AHC138 3-Line to 8-Line Decoders/Demultiplexers datasheet (Rev. N) | PDF | HTML | Jul 24, 2024 |
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The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,
14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| SOIC (D) | 16 | Ultra Librarian |
| TVSOP (DGV) | 16 | Ultra Librarian |
| SSOP (DB) | 16 | Ultra Librarian |
| PDIP (N) | 16 | Ultra Librarian |
| TSSOP (PW) | 16 | Ultra Librarian |
| VQFN (RGY) | 16 | Ultra Librarian |
| SOP (NS) | 16 | Ultra Librarian |
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