The TLC555 is a monolithic timing circuit fabricated using the TI LinCMOS™ technology. The timer is fully compatible with CMOS, TTL, and MOS logic and operates at frequencies up to 2 MHz. Because of a high input impedance, this device supports smaller timing capacitors than those supported by the NE555 or LM555. As a result, more accurate time delays and oscillations are possible. Power consumption is low across the full range of power-supply voltage.
Like the NE555, the TLC555 has a trigger level equal to approximately one-third of the supply voltage and a threshold level equal to approximately two-thirds of the supply voltage. These levels can be altered by use of the control voltage terminal (CONT). When the trigger input (TRIG) falls below the trigger level, the flip-flop is set and the output goes high. If TRIG is above the trigger level and the threshold input (THRES) is above the threshold level, the flip-flop is reset and the output is low. The reset input (RESET) can override all other inputs and can be used to initiate a new timing cycle. If RESET is low, the flip-flop is reset and the output is low. Whenever the output is low, a low-impedance path is provided between the discharge terminal (DISCH) and GND. All unused inputs must be tied to an appropriate logic level to prevent false triggering.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | TLC555 LinCMOS™ Technology Timer datasheet (Rev. J) | PDF | HTML | 27 Nov 2023 |
| Circuit design | Frequency-to-Voltage Conversion Circuit Using a 555 Timer | 21 Sep 2023 | ||
| Application note | Considering TI Smart DACs As an Alternative to 555 Timers | PDF | HTML | 02 Sep 2021 | |
| More literature | Design low-duty-cycle timer circuits | 03 Oct 2016 | ||
| Application note | TLC555-Q1 Used as a Positive and Negative Charge Pump | 25 May 2016 | ||
| Application note | Synchronizing Three or More UCC28950 Phase-Shifted, Full-Bridge Controllers | 13 Sep 2011 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| PDIP (P) | 8 | Ultra Librarian |
| SOIC (D) | 8 | Ultra Librarian |
| SOP (PS) | 8 | Ultra Librarian |
| TSSOP (PW) | 14 | Ultra Librarian |
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