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SN74AHC4066

ACTIVE

5-V, 1:1 (SPST), 4-channel general-purpose analog switch

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Data sheet

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TMUX1134 ACTIVE 3-pA on-state leakage current, 2:1 (SPDT), 4-channel precision analog switch Lower current leakage and supply

SN74AHC4066

ACTIVE
Data sheet Order now

Product details

Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 21 CON (typ) (pF) 5.5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 50 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
Configuration 1:1 SPST Number of channels 4 Power supply voltage - single (V) 2.5, 3.3, 5 Protocols Analog Ron (typ) (Ω) 21 CON (typ) (pF) 5.5 ON-state leakage current (max) (µA) 1 Bandwidth (MHz) 50 Operating temperature range (°C) -40 to 85 Input/output continuous current (max) (mA) 25 Rating Catalog Drain supply voltage (max) (V) 5.5 Supply voltage (max) (V) 5.5
PDIP (N) 14 181.42 mm² 19.3 x 9.4 SOIC (D) 14 51.9 mm² 8.65 x 6 SOP (NS) 14 79.56 mm² 10.2 x 7.8 SSOP (DB) 14 48.36 mm² 6.2 x 7.8 TSSOP (PW) 14 32 mm² 5 x 6.4 TVSOP (DGV) 14 23.04 mm² 3.6 x 6.4 VQFN (RGY) 14 12.25 mm² 3.5 x 3.5
  • 1V to 5.5V VCC operation
  • Supports mixed-mode voltage operation on all ports
  • High on-off output-voltage ratio
  • Low crosstalk between switches
  • Individual switch controls
  • Extremely low input current
  • ESD protection exceeds JESD 22:
    • 2000V Human-Body Model (A114-A)
    • 200V Machine Model (A115-A)
    • 1000V Charged-Device Model (C101)
  • 1V to 5.5V VCC operation
  • Supports mixed-mode voltage operation on all ports
  • High on-off output-voltage ratio
  • Low crosstalk between switches
  • Individual switch controls
  • Extremely low input current
  • ESD protection exceeds JESD 22:
    • 2000V Human-Body Model (A114-A)
    • 200V Machine Model (A115-A)
    • 1000V Charged-Device Model (C101)

This quadruple silicon-gate CMOS analog switch is designed for 1V to 5.5V VCC operation.

The switch is designed to handle both analog and digital signals. Each switch permits signals with amplitudes of up to 5.5V (peak) to be transmitted in either direction.

Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the associated switch section.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.

This quadruple silicon-gate CMOS analog switch is designed for 1V to 5.5V VCC operation.

The switch is designed to handle both analog and digital signals. Each switch permits signals with amplitudes of up to 5.5V (peak) to be transmitted in either direction.

Each switch section has its own enable input control (C). A high-level voltage applied to C turns on the associated switch section.

Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for analog-to-digital and digital-to-analog conversion systems.
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Technical documentation

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Type Title Date
* Data sheet SN74AHC4066 Quadruple Bilateral Analog Switch datasheet (Rev. A) PDF | HTML 09 Feb 2024
Application note Selecting the Correct Texas Instruments Signal Switch (Rev. E) PDF | HTML 02 Jun 2022
Application note Multiplexers and Signal Switches Glossary (Rev. B) PDF | HTML 01 Dec 2021
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Product overview Design Summary for WCSP Little Logic (Rev. B) 04 Nov 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004
Application note Advanced High-Speed CMOS (AHC) Logic Family (Rev. C) 02 Dec 2002
Application note Texas Instruments Little Logic Application Report 01 Nov 2002
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Design guide AHC/AHCT Designer's Guide February 2000 (Rev. D) 24 Feb 2000
Application note Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A) 08 Sep 1999
Product overview Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C) 01 Apr 1998
Application note Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices 01 Dec 1997
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Live Insertion 01 Oct 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Interface adapter

LEADED-ADAPTER1 — Surface mount to DIP header adapter for quick testing of TI's 5, 8, 10, 16 & 24-pin leaded packages

The EVM-LEADED1 board allows for quick testing and bread boarding of TI's common leaded packages.  The board has footprints to convert TI's D, DBQ, DCT,DCU, DDF, DGS, DGV, and PW surface mount packages to 100mil DIP headers.     

User guide: PDF
Not available on TI.com
Package Pins CAD symbols, footprints & 3D models
PDIP (N) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian
SSOP (DB) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
TVSOP (DGV) 14 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

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