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NAND gates

SN74AHCT00

ACTIVE

4-ch, 2-input, 4.5-V to 5.5-V NAND gates with TTL-compatible CMOS inputs

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Data sheet

SN74AHCT00

ACTIVE
Data sheet Order now

Product details

Technology family AHCT Number of channels 4 Inputs per channel 2 IOL (max) (mA) 8 IOH (max) (mA) -8 Input type TTL-Compatible CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 70 Rating Catalog Operating temperature range (°C) -40 to 125
Technology family AHCT Number of channels 4 Inputs per channel 2 IOL (max) (mA) 8 IOH (max) (mA) -8 Input type TTL-Compatible CMOS Output type Push-Pull Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 70 Rating Catalog Operating temperature range (°C) -40 to 125
TSSOP (PW) 14 32 mm² (5 mm × 6.4 mm) SOP (NS) 14 79.56 mm² (10.2 mm × 7.8 mm) WQFN (BQA) 14 7.5 mm² (3 mm × 2.5 mm) TVSOP (DGV) 14 23.04 mm² (3.6 mm × 6.4 mm) SOIC (D) 14 51.9 mm² (8.65 mm × 6 mm) SSOP (DB) 14 48.36 mm² (6.2 mm × 7.8 mm) VQFN (RGY) 14 12.25 mm² (3.5 mm × 3.5 mm) PDIP (N) 14 181.42 mm² (19.3 mm × 9.4 mm)
  • Operating range of 4.5 V to 5.5 V
  • Low power consumption, 10-µA maximum I CC
  • ±8-mA output drive at 5 V
  • Inputs are TTL-voltage compatible
  • Latch-up performance exceeds 250 mA per JESD 17
  • Operating range of 4.5 V to 5.5 V
  • Low power consumption, 10-µA maximum I CC
  • ±8-mA output drive at 5 V
  • Inputs are TTL-voltage compatible
  • Latch-up performance exceeds 250 mA per JESD 17

The ’AHCT00 devices perform the Boolean function Y = A • B or Y = A + B in positive logic.

The ’AHCT00 devices perform the Boolean function Y = A • B or Y = A + B in positive logic.
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Technical documentation

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* Data sheet SNx4AHCT00 Quadruple 2-Input Positive-NAND Gates datasheet (Rev. L) PDF | HTML May 3, 2023

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Evaluation board

14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

User guide: PDF | HTML
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Simulation model

SN74AHCT00 Behavioral SPICE Model

SCLM259.ZIP (7 KB) - PSpice model
Supported products & hardware
Simulation model

SN74AHCT00 IBIS Model (Rev. A)

SCLM057 (13 KB) - IBIS model
Supported products & hardware
Package Pins CAD symbols, footprints & 3D models
TSSOP (PW) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian
WQFN (BQA) 14 Ultra Librarian
TVSOP (DGV) 14 Ultra Librarian
SOIC (D) 14 Ultra Librarian
SSOP (DB) 14 Ultra Librarian
VQFN (RGY) 14 Ultra Librarian
PDIP (N) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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