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SN74LV244A

ACTIVE

Eight-channel 2-V to 5.5-V buffers with tri-state outputs

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Data sheet

SN74LV244A

ACTIVE
Data sheet Order now

Product details

Technology family LV-A Number of channels 8 IOL (max) (mA) 16 Supply current (max) (µA) 20 IOH (max) (mA) -16 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LV-A Number of channels 8 IOL (max) (mA) 16 Supply current (max) (µA) 20 IOH (max) (mA) -16 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
SOIC (DW) 20 131.84 mm² (12.8 mm × 10.3 mm) TSSOP (PW) 20 41.6 mm² (6.5 mm × 6.4 mm) VQFN (RKS) 20 11.25 mm² (4.5 mm × 2.5 mm) VSSOP (DGS) 20 24.99 mm² (5.1 mm × 4.9 mm) VQFN (RGY) 20 15.75 mm² (4.5 mm × 3.5 mm) SSOP (DB) 20 56.16 mm² (7.2 mm × 7.8 mm) SOP (NS) 20 98.28 mm² (12.6 mm × 7.8 mm) TVSOP (DGV) 20 32 mm² (5 mm × 6.4 mm)
  • V CC operation of 2 V to 5.5 V
  • Maximum t pd of 6.5 ns at 5 V
  • Typical V OLP (output ground bounce) <0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (output V OH undershoot) >2.3 V at V CC = 3.3 V, T A = 25°C
  • Support mixed-mode voltage operation on all ports
  • I off supports partial-power-down mode operation
  • Latch-up performance exceeds 250-mA per JESD 17
  • V CC operation of 2 V to 5.5 V
  • Maximum t pd of 6.5 ns at 5 V
  • Typical V OLP (output ground bounce) <0.8 V at V CC = 3.3 V, T A = 25°C
  • Typical V OHV (output V OH undershoot) >2.3 V at V CC = 3.3 V, T A = 25°C
  • Support mixed-mode voltage operation on all ports
  • I off supports partial-power-down mode operation
  • Latch-up performance exceeds 250-mA per JESD 17

The SN74LV244A octal buffers and line drivers are designed for 2-V to 5.5-V V CC operation.

The SN74LV244A devices are designed specifically to improve both performance and density of the 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. These devices are organized as two 4-bit line drivers with separate output-enable ( OE) inputs.

The SN74LV244A octal buffers and line drivers are designed for 2-V to 5.5-V V CC operation.

The SN74LV244A devices are designed specifically to improve both performance and density of the 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. These devices are organized as two 4-bit line drivers with separate output-enable ( OE) inputs.
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* Data sheet SN74LV244A Octal Buffers and Drivers With 3-State Outputs datasheet (Rev. R) PDF | HTML Aug 1, 2023

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

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14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

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14-24-NL-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin non-leaded packages

14-24-NL-LOGIC-EVM is a flexible evaluation module (EVM) designed to support any logic or translation device that has a 14-pin to 24-pin BQA, BQB, RGY, RSV, RJW or RHL package.

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Simulation model

SN74LV244A Behavioral SPICE Model

SCEM653.ZIP (7 KB) - PSpice model
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Simulation model

SN74LV244A IBIS Model (Rev. A)

SCEM137 (18 KB) - IBIS model
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Package Pins CAD symbols, footprints & 3D models
SOIC (DW) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian
VQFN (RKS) 20 Ultra Librarian
VSSOP (DGS) 20 Ultra Librarian
VQFN (RGY) 20 Ultra Librarian
SSOP (DB) 20 Ultra Librarian
SOP (NS) 20 Ultra Librarian
TVSOP (DGV) 20 Ultra Librarian
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