The TDP2004-Q1 is a four-channel
low-power high-performance linear repeater or redriver designed to support DisplayPort 2.1 up to
20Gbps and AC coupled HDMI2.1 Source up to 12Gbps.
The TDP2004-Q1 receivers deploy
continuous time linear equalizers (CTLE) to provide a programmable high-frequency
boost. The equalizer can open an input eye that is completely closed due to
inter-symbol interference (ISI) induced by an interconnect medium, such as PCB
traces or cables. The linear data-paths of TDP2004-Q1 preserve
transmit preset signal characteristics. High bandwidth, low channel-to-channel
cross-talk, low additive jitter and excellent return loss makes the device almost a
passive element in the link, but with useful equalization. The DisplayPort link
training is effective through the linear redriver that becomes part of the passive
channel in between source Tx and sink Rx. This transparency in the link training
protocol results in optimum electrical link and lowest possible latency. The
data-path of the device uses an internally regulated power rail that provides high
immunity to any supply noise on the board.
The device also has low AC and DC gain variation
providing consistent equalization in high volume platform deployment.
The TDP2004-Q1 is a four-channel
low-power high-performance linear repeater or redriver designed to support DisplayPort 2.1 up to
20Gbps and AC coupled HDMI2.1 Source up to 12Gbps.
The TDP2004-Q1 receivers deploy
continuous time linear equalizers (CTLE) to provide a programmable high-frequency
boost. The equalizer can open an input eye that is completely closed due to
inter-symbol interference (ISI) induced by an interconnect medium, such as PCB
traces or cables. The linear data-paths of TDP2004-Q1 preserve
transmit preset signal characteristics. High bandwidth, low channel-to-channel
cross-talk, low additive jitter and excellent return loss makes the device almost a
passive element in the link, but with useful equalization. The DisplayPort link
training is effective through the linear redriver that becomes part of the passive
channel in between source Tx and sink Rx. This transparency in the link training
protocol results in optimum electrical link and lowest possible latency. The
data-path of the device uses an internally regulated power rail that provides high
immunity to any supply noise on the board.
The device also has low AC and DC gain variation
providing consistent equalization in high volume platform deployment.