产品详情

CPU 8 Arm Cortex-A720AE Coprocessors 6 Arm Cortex-R52+ Hardware accelerators Deep learning accelerator, Depth and motion processing accelerator, Video decode accelerator, Video encode accelerator Operating system FreeRTOS, INTEGRITY, Linux, QNX, SafeRTOS, u-velOSity Security Cryptographic acceleration, Secure boot TI functional safety category Functional Safety-Compliant Rating Catalog Power supply solution TPS6594-Q1 Operating temperature range (°C) -40 to 125
CPU 8 Arm Cortex-A720AE Coprocessors 6 Arm Cortex-R52+ Hardware accelerators Deep learning accelerator, Depth and motion processing accelerator, Video decode accelerator, Video encode accelerator Operating system FreeRTOS, INTEGRITY, Linux, QNX, SafeRTOS, u-velOSity Security Cryptographic acceleration, Secure boot TI functional safety category Functional Safety-Compliant Rating Catalog Power supply solution TPS6594-Q1 Operating temperature range (°C) -40 to 125
FCBGA (ALF) 827 576 mm² 24 x 24

Processor cores:

  • Up-to Eight Arm Cortex-A720AE MPUs
    • Lockstep capable

Real-Time processing CPUs :

  • Up-to 6x Arm® Cortex®-R52+ (or 3x pairs in Lockstep)
    • Virtualization for multi-core processing

System/SOC CPUs:

  • 8x Dual Arm® Cortex®-M55 (Lockstep)

DSP / AI processing :

  • Up to 4x C7™ neural processing unit(NPU)
    • Up to 400 TOPS

Vision and video processing:

  • Up to 16 cameras
  • DMPAC: Dense Optical Flow, Stereo Disparity Engine
  • 4x CSI-2 RX interface, 1x CSI-2 TX output

GPU and display processing:

  • Imagination DXS Family GPU

Display subsystem:

  • eDP1.5/DP2.1
    • Multi-Stream Transport (up to 4 displays, up to 4K60fps)
  • 1x DSI CPHY-2.0/DPHY-2.1
    • Up to 4 lanes per port (muxed with CSI-TX)
  • DSS Controller:
    • 4 pipelines + 1 Writeback path, up to 4k60 per pipe

Networking subsystem:

  • NPAC (Network Processing Accelerator) specialized subsystem for Ethernet switching and packet transfer
  • Integrated Ethernet Switch
    • 8 external ports
    • 10base-T1S (OA3P 3-wire i/f) supported on all ports
    • MACSEC per port, supports line rate

Memory:

  • LPDDR4x/5/5x interface
    • In-line ECC
  • 1x UFS3.0
  • 1x eMMC5.1 HS200
  • 2x XSPI interface up to 400MBps

Security:

  • SHE/EVITA Full compliant HSM, ISO21434 compliant

Functional Safety:

Safety features:

  • Support for full ASIL D or mixed ASIL D / ASIL B with FFI

High-speed serial interfaces:

  • 2x PCIe up to 4L
    • Gen5 controller
    • Root complex or Endpoint
  • 1x USB3.2 (Gen 2)/eUSB2.0

Video acceleration:

  • H.264/H.265 Encode/Decode: 1.0GP/s encode or decode, up to 10b support

Serial interfaces:

  • Up to 170 General-Purpose Input/Output (GPIO) pin capability

TPS6594-Q1 Companion Power Management ICs (PMIC):

  • Functional Safety-Compliant support up to ASIL D/SIL 3
  • Flexible mapping to support different use cases

Processor cores:

  • Up-to Eight Arm Cortex-A720AE MPUs
    • Lockstep capable

Real-Time processing CPUs :

  • Up-to 6x Arm® Cortex®-R52+ (or 3x pairs in Lockstep)
    • Virtualization for multi-core processing

System/SOC CPUs:

  • 8x Dual Arm® Cortex®-M55 (Lockstep)

DSP / AI processing :

  • Up to 4x C7™ neural processing unit(NPU)
    • Up to 400 TOPS

Vision and video processing:

  • Up to 16 cameras
  • DMPAC: Dense Optical Flow, Stereo Disparity Engine
  • 4x CSI-2 RX interface, 1x CSI-2 TX output

GPU and display processing:

  • Imagination DXS Family GPU

Display subsystem:

  • eDP1.5/DP2.1
    • Multi-Stream Transport (up to 4 displays, up to 4K60fps)
  • 1x DSI CPHY-2.0/DPHY-2.1
    • Up to 4 lanes per port (muxed with CSI-TX)
  • DSS Controller:
    • 4 pipelines + 1 Writeback path, up to 4k60 per pipe

Networking subsystem:

  • NPAC (Network Processing Accelerator) specialized subsystem for Ethernet switching and packet transfer
  • Integrated Ethernet Switch
    • 8 external ports
    • 10base-T1S (OA3P 3-wire i/f) supported on all ports
    • MACSEC per port, supports line rate

Memory:

  • LPDDR4x/5/5x interface
    • In-line ECC
  • 1x UFS3.0
  • 1x eMMC5.1 HS200
  • 2x XSPI interface up to 400MBps

Security:

  • SHE/EVITA Full compliant HSM, ISO21434 compliant

Functional Safety:

Safety features:

  • Support for full ASIL D or mixed ASIL D / ASIL B with FFI

High-speed serial interfaces:

  • 2x PCIe up to 4L
    • Gen5 controller
    • Root complex or Endpoint
  • 1x USB3.2 (Gen 2)/eUSB2.0

Video acceleration:

  • H.264/H.265 Encode/Decode: 1.0GP/s encode or decode, up to 10b support

Serial interfaces:

  • Up to 170 General-Purpose Input/Output (GPIO) pin capability

TPS6594-Q1 Companion Power Management ICs (PMIC):

  • Functional Safety-Compliant support up to ASIL D/SIL 3
  • Flexible mapping to support different use cases

The TDA5 high-performance compute SoC family is designed to deliver safe and efficient edge AI performance, with capabilities of up to 1200 TOPS, with integrated C7™ NPU and chiplet-ready architecture. This enables seamless progression to L3 autonomous driving in software-defined vehicles, where conditional automation is possible in both urban and highway environments. Additionally, the TDA5 SoCs are well-suited for similar applications in industrial transportation, humanoid and industrial robots, and aerospace and defense with their advanced sensor processing, cybersecurity, and functional safety features.

The TDA5 SoCs feature multiple specialized subsystems, each tailored to address the growing demand for high-performance compute and cross-domain applications. These subsystems include dedicated processing cores and hardware acceleration for security, vision processing, edge AI, display rendering, and networking. By offloading these tasks, the SoCs’ MPU and MCU cores are freed up to focus on user application software. Furthermore, support for PCIe, Ethernet, and other automotive standard peripherals enables safe, secure, and high-speed data transfer between different components and systems.

Building on two decades of leadership in the automotive processor market, the TDA5 architecture is designed to provide a scalable and high-performance solution for a wide range of applications. As an evolution of the TDA4 family, software developed for TDA4 can be easily scaled to the TDA5 family, with minimal rework required. This allows for the reuse of software assets and enables the development of more complex and sophisticated applications. The TDA5 family’s unique combination of high-performance real-time and analytics cores, along with the latest C7™ NPU and next-generation accelerators for image signal processing, makes it an optimized solution for various camera, radar, sensor fusion, and AI applications.

The TDA5 family provides high-performance compute capabilities for both traditional computer vision and deep learning algorithms, with industry-leading power/performance ratios. The high level of system integration enables lower costs for advanced automotive platforms, supporting multiple sensor modalities in centralized ECUs, multiple sensor domains, or a centralized automotive computer. Key processing and acceleration cores include the latest-generation C7™ DSP with scalar and vector cores, dedicated deep learning acceleration, latest application and GPU cores for general compute, a vision and imaging subsystem, video codec, network packet processing accelerator, and Ethernet switch, as well as a dedicated security subsystem. These cores are carefully integrated into an SoC architecture designed from the ground up to support functional safety at a system level, ensuring the highest level of reliability and performance in safety-critical applications.

The TDA5 high-performance compute SoC family is designed to deliver safe and efficient edge AI performance, with capabilities of up to 1200 TOPS, with integrated C7™ NPU and chiplet-ready architecture. This enables seamless progression to L3 autonomous driving in software-defined vehicles, where conditional automation is possible in both urban and highway environments. Additionally, the TDA5 SoCs are well-suited for similar applications in industrial transportation, humanoid and industrial robots, and aerospace and defense with their advanced sensor processing, cybersecurity, and functional safety features.

The TDA5 SoCs feature multiple specialized subsystems, each tailored to address the growing demand for high-performance compute and cross-domain applications. These subsystems include dedicated processing cores and hardware acceleration for security, vision processing, edge AI, display rendering, and networking. By offloading these tasks, the SoCs’ MPU and MCU cores are freed up to focus on user application software. Furthermore, support for PCIe, Ethernet, and other automotive standard peripherals enables safe, secure, and high-speed data transfer between different components and systems.

Building on two decades of leadership in the automotive processor market, the TDA5 architecture is designed to provide a scalable and high-performance solution for a wide range of applications. As an evolution of the TDA4 family, software developed for TDA4 can be easily scaled to the TDA5 family, with minimal rework required. This allows for the reuse of software assets and enables the development of more complex and sophisticated applications. The TDA5 family’s unique combination of high-performance real-time and analytics cores, along with the latest C7™ NPU and next-generation accelerators for image signal processing, makes it an optimized solution for various camera, radar, sensor fusion, and AI applications.

The TDA5 family provides high-performance compute capabilities for both traditional computer vision and deep learning algorithms, with industry-leading power/performance ratios. The high level of system integration enables lower costs for advanced automotive platforms, supporting multiple sensor modalities in centralized ECUs, multiple sensor domains, or a centralized automotive computer. Key processing and acceleration cores include the latest-generation C7™ DSP with scalar and vector cores, dedicated deep learning acceleration, latest application and GPU cores for general compute, a vision and imaging subsystem, video codec, network packet processing accelerator, and Ethernet switch, as well as a dedicated security subsystem. These cores are carefully integrated into an SoC architecture designed from the ground up to support functional safety at a system level, ensuring the highest level of reliability and performance in safety-critical applications.

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* 数据表 TDA54x Jacinto™ Processors 数据表 PDF | HTML 2025年 12月 9日
技术文章 为什么可扩展高性能 SoC 是自动驾驶汽车的未来 PDF | HTML 英语版 PDF | HTML 2025年 12月 31日
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应用简报 Accelerating next-generation automotive designs with the TDA5 Virtualizer™ Development Kit PDF | HTML 2025年 12月 23日

设计和开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

调试探针

LB-3P-TRACE32-ARM — 适用于基于 Arm® 的微控制器和处理器的 Lauterbach TRACE32® 调试和跟踪系统

Lauterbach TRACE32® 工具是一套先进的硬件和软件组件,开发人员可通过它分析、优化和认证各种基于 Arm® 的微控制器和处理器。这套全球知名的嵌入式系统和 SoC 调试和跟踪解决方案是所有开发阶段(从器件前开发一直到产品认证和现场故障排查)的理想解决方案。Lauterbach 工具直观的模块化设计可为工程师提供当今最高的可用性能,并提供可随需求变化而调整和扩展的系统。借助 TRACE32® 调试器,开发人员还可以通过单个调试接口同时调试和控制 SoC 中的任何 C28x/C29x C6x/C7x DSP 内核以及所有其他 Arm 内核,这是业界的一项独特功能。

来源:Lauterbach GmbH
软件开发套件 (SDK)

SNPS-3P-TDA5-VDK — 适用于 TDA5 驱动辅助 SoC 的 Synopsys 虚拟开发套件

The TDA5 Virtualizer Development Kit (VDK), built with Synopsys Virtualizer™, enables software development on a register-accurate simulation of TDA5 drive assist SoCs. This creates an electronics digital twin of production systems to execute unmodified binaries of production software (SW) with (...)
来源:Synopsys
应用软件和框架

SV-3P-FRONTVISION — FrontVision - STRADVISION 汽车感知软件

FrontVision 可利用前置摄像头的图像作为输入,检测道路上的各种因素,例如车辆、行人、车道、交通信号灯和交通标志。它支持用户开发具有不同自主水平的自主驾驶功能,从欧洲 GSR/NCAP 法规所要求的基本 ADAS 功能到上述 L2/L2+/L3 级别的自主驾驶功能,不一而足。
来源:Stradvision
应用软件和框架

SV-3P-SURROUNDVISION — SurroundVision - STRADVISION 汽车感知软件

SurroundVision 将环视摄像头的图像作为输入,能检测车辆周围的各种物体,包括车辆、行人、停车位和路缘石。借助其高度准确的感知输出,用户能够开发盲点监控系统等安全功能,以及即使在具有挑战性的场景下也能工作的自动泊车辅助功能
来源:Stradvision
IDE、配置、编译器或调试器

CCSTUDIO Code Composer Studio 集成式开发环境 (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It is comprised of a rich suite of tools used to build, debug, analyze and optimize embedded applications. Code Composer Studio is available across Windows®, Linux® and macOS® platforms.

(...)

支持的产品和硬件

支持的产品和硬件

此设计资源支持这些类别中的大部分产品。

查看产品详情页,验证是否能提供支持。

启动 下载选项
IDE、配置、编译器或调试器

GHS-3P-MULTI-IDE — Green Hills Software MULTI Integrated Development Environment

The MULTI® development environment has been in use by thousands of developers for three decades and is the industry’s unrivaled integrated development environment to create, debug, and optimize C, C++ and Ada  code for production-focused applications.  It brings together (...)
操作系统 (OS)

GHS-3P-UVELOSITY — Green Hills Software u-velOSity Safety RTOS

The µ-velOSity™ Safety RTOS is the smallest of Green Hills Software's real-time operating systems and was designed especially for microcontrollers. It supports a wide range of TI processor families using the Arm® Cortex-M or Cortex-R cores as a main CPU or as a co-processors (...)
操作系统 (OS)

QNX-3P-NEUTRINO-RTOS — QNX Neutrino® 实时操作系统 (RTOS)

QNX Neutrino® 实时操作系统 (RTOS) 是功能齐全且稳健的 RTOS,旨在为汽车、医疗、交通、军事和工业嵌入式系统提供下一代产品。微内核设计和模块化架构使客户能够以较低的总拥有成本打造高度优化和可靠的系统。
操作系统 (OS)

WHIS-3P-SAFERTOS — WITTENSTEIN SafeRTOS 预先认证的安全 RTOS

SAFERTOS® 是专为嵌入式处理器设计的独特实时操作系统。它通过了 TÜV SÜD 的 IEC 61508 SIL3 和 ISO 26262 ASILD 标准的预先认证。SAFERTOS® 是由 WHIS 的专家团队专为安全而设计的,并在全球范围内用于安全关键型应用。WHIS 和德州仪器 (TI) 合作已有十多年。在此期间,WHIS 已将 SAFERTOS® 移植到各种 TI 处理器中,支持所有常用内核,并可按需提供其他架构。SAFERTOS® 针对您的特定处理器/编译器组合进行定制,并随附完整的源代码和设计保证包,在整个设计生命周期中提供完全透明度。许多 WHIS 客户使用 (...)
支持软件

EXLFR-3P-ESYNC-OTA — 适用于软件定义车辆的 Excelfore esync OTA 无线更新

Experience the future of the connected SDV starting with full vehicle OTA from Excelfore. The standardized and structured eSync pipeline securely scales to reach all the ECUs and smart sensors in the car, with the flexibility to cover any in-vehicle network topology or system architecture.
eSync (...)
来源:ExcelFore
支持软件

TDA54-SW Software package enabling development on TDA54

This folder contains the restricted software packages for TDA54 enabling software development.
支持的产品和硬件

支持的产品和硬件

产品
汽车驾驶辅助 SoC
TDA54-Q1 搭载新一代 C7TM NPU 的高端 SoC,适用于 ADAS 和软件定义车辆中的高级 AI
软件
软件开发套件 (SDK)
SNPS-3P-TDA5-VDK 适用于 TDA5 驱动辅助 SoC 的 Synopsys 虚拟开发套件
支持软件

VCTR-3P-MICROSAR — 适用于微控制器和高性能计算机 (HPC) 的 Vector MICROSAR AUTOSAR 软件

MICROSAR 和 DaVinci 产品系列凭借适用于微控制器和 HPC 的先进嵌入式软件和强大的开发工具简化了 ECU 开发。利用先进的基础设施软件,即可为 ECU 奠定良好基础,并使用相关工具简化所有配套开发任务。MICROSAR 嵌入式软件是按照 AUTOSAR classic 和 adaptive 等相关标准开发的。根据 ISO 26262 高达 ASIL D 的安全标准,该软件还适用于安全相关应用。此外,智能网络安全功能可保护控制单元免受未经授权的访问和操纵。Vector 涵盖汽车和其他工业应用的所有用例。对于具有高性能计算机的软件定义车辆 (...)
封装 引脚 CAD 符号、封装和 3D 模型
FCBGA (ALF) 827 Ultra Librarian

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

推荐产品可能包含与 TI 此产品相关的参数、评估模块或参考设计。

支持和培训

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