LMK61E0MEVM
LMK61E0M 超低ジッタ・プログラマブル・オシレータの評価モジュール
LMK61E0MEVM
概要
The LMK61E0MEVM evaluation modules provides a complete platform to evaluate the jitter performance and configurability of the Texas Instruments LMK61E0M Ultra-Low Jitter Programmable Oscillator with integrated EEPROM and extended frequency margining capabilities.
The LMK61E0MEVM can be used as a high performance clock source for jitter critical applications and can easily be customized to any user desired frequency. The onboard USB to I2C interface allows for device configuration via a software graphical user interface (GUI) and requires no external input or power for device operation. The edge-launch SMA ports provide access to the LMK61E0M’s dual LVCMOS clock outputs for interfacing to test equipment or reference boards using commercially available coaxial cables, adapters, or baluns (not included).
特長
- Ultra low jitter dual output LVCMOS clock generation
- Powered over USB or externally (SMA connector)
- Onboard USB to I2C interface
- Coarse and Fine Frequency margining
- GUI platform for full access to registers and EEPROM
- 3-ft. USB cable, Q362-ND
発振器
購入と開発の開始
LMK61E0MEVM — LMK61E0M 超低ジッタ・プログラマブル・オシレータの評価モジュール
TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
TICSPRO-SW — TICS Pro GUI and Live Programming Tool for Clocking Devices
TICS Pro 1.7.8.0 installer binary for Windows operating system
製品
クロック・ジェネレータ
クロック・バッファ
発振器
クロック ジッタ クリーナ
クロック ネットワーク シンクロナイザ
RF PLL / シンセサイザ
ハードウェア開発
評価ボード
ドキュメント
TICS Pro 1.7.8.0 Release Notes
TICS Pro 1.7.8.0 Software Manifest
リリース情報
Added
- LMK5C23208A
Improvements
- TCP server returns error descriptions
- TICSPro_TCP.py updated for python ≥ 3.10. Remove type annotations if backward compatibility with older python versions is required.
- LMK5B/5C:
- Warn when GPIOx selects REFx monitor, but REFx is not programmed
- Relative calculation of DPLLx_PH_OFFSET value
- Added fields and improved frequency planning for 1-PPS outputs
- PLLx_RDIV_MUX_SEL only sets recommended values when dropdown is changed; no longer changed by DPLL loop filter calculation or TCS file load
- Advanced Options checkbox added on Getting Started page
- GPIOx descriptions updated for accuracy
- LMK5B12212, LMK5C12212A:
- New step added to Start Page process to reduce current consumption and noise
- SRAM sequence EEPROM generation sets optimized values from new step in Start Page process
- LMK5B33414, LMK5C33414A:
- Simplified programming sequence by combining writes for the output divider synchronization sequence generator
Bug Fixes
- LMK5B12212, LMK5C12212A:
- Some controls which were not register-backed have been updated to be register-backed.
- LMK5B33414, LMK5C33414A:
- Fixed "Set SYNC Enable" buttons on "SYNC/SYSREF/1-PPS" page
Known Issues
- LMK5B and LMK5C family - In some cases, "Assign Selected VCO Settings to Device" and "Apply Output Clock Settings to Device" may need to be pressed twice for certain cascaded configurations to display correctly
- LMK05318 - In some cases, it is necessary to press "Calculate Frequency Plan" twice for correct VCO2 frequency. This issue is resolved in LMK05318B GUI.
- Burst mode page looping requires long delays to halt, and halting may crash the GUI. If possible, do not loop in burst mode.
- User Controls page can sometimes become desynchronized from Raw Registers and other pages. Refer to Raw Registers or other pages for correct values. Saving/Loading and Import/Export of register data is unaffected, and register data will still be written to and read from connected devices correctly.
技術資料
種類 | タイトル | 英語版のダウンロード | 日付 | |||
---|---|---|---|---|---|---|
* | EVM ユーザー ガイド (英語) | LMK61E2EVM, LMK61E0MEVM User's Guide (Rev. B) | 2017年 8月 10日 | |||
証明書 | LMK61E0MEVM EU Declaration of Conformity (DoC) | 2019年 1月 2日 | ||||
データシート | LMK61E0M EEPROM内蔵、超低ジッタのプログラマブル発振器 データシート (Rev. A 翻訳版) | PDF | HTML | 英語版 (Rev.A) | PDF | HTML | 2018年 2月 28日 |