(1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over the specified temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
The TPS75201M-EP is a low dropout regulator with an integrated power-on reset (RESET) function. This device is capable of supplying 2 A of output current with a dropout of 210 mV. Quiescent current is 75 µA at full load and drops down to 1 μA when the device is disabled. The TPS75201M-EP is designed to have fast transient response for larger load current changes.
Because the PMOS device operates like a low-value resistor, the dropout voltage is very low (typically 210 mV at an output current of 2 A) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (75 &micr;A typ over the full range of output current, 1 mA to 2 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.
The device is enabled when the enable (EN) input is connected to a low-level input voltage. This low-dropout (LDO) device also features a sleep mode; applying a TTL high signal to EN shuts down the regulator, reducing the quiescent current to 1 µA at TJ = 25°C.
The RESET (SVS, POR, or power-on reset) output of the TPS75201M-EP initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS75201M-EP monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET goes to a high-impedance state after a 100-ms delay. RESET goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., overload condition) of its regulated voltage.
The TPS75201M-EP is adjustable (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | TPS75201M-EP datasheet (Rev. A) | 26 Jul 2013 | |
| * | Radiation & reliability report | TPS75201MPWPREP Reliability Report | 22 Dec 2014 | |
| * | Radiation & reliability report | TPS75201MPWPREP Reliability Report | 24 Apr 2013 | |
| Application note | LDO Noise Demystified (Rev. B) | PDF | HTML | 18 Aug 2020 | |
| Application note | LDO PSRR Measurement Simplified (Rev. A) | PDF | HTML | 09 Aug 2017 |
For additional terms or required resources, click any title below to view the detail page where available.
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| HTSSOP (PWP) | 20 | Ultra Librarian |
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