The TXE8124-Q1 devices provide general purpose parallel input/output (I/O) expansion for the four wire Serial Peripheral Interface (SPI) protocol and is designed for 1.65V to 5.5V VCC operation. The TXE8124-Q1 supports both standard point-to-point communication along with daisy-chaining of multiple devices.
The device supports 10MHz from 3.3V to 5.5V and 5MHz from 1.65V to 5.5V. I/O expanders, such as the TXE8124-Q1, are designed for when additional I/Os are needed for switches, sensors, push-buttons, LEDs, and fans.
The TXE8124-Q1 devices has 3 I/O ports of 8 IOs each, which include additional features designed to enhance the I/O performance in terms of speed, power consumption, and flexibility. These include per I/O programmable open-drain or push-pull outputs, programmable pull-up and pull-down resistors, bus-hold latchable inputs, maskable interrupt, interrupt status register, glitch filter and a fail-safe register mode which is enabled by the FAIL-SAFE pin.
| Top documentation | Type | Title | Format options | Date |
|---|---|---|---|---|
| * | Data sheet | TXE8124-Q1 Automotive 24-Bit SPI Bus I/O Expander with Interrupt Output, Reset Input, and I/O Configuration Registers datasheet (Rev. B) | PDF | HTML | Jul 31, 2026 |
| Application note | Application of TXE81XX SPI to GPIO Expander Fail-Safe Feature | PDF | HTML | Jun 12, 2026 | |
| Application note | How to Use SPI Daisy Chaining with TXE81XX Devices (Rev. A) | PDF | HTML | May 8, 2026 | |
| Functional safety information | TXE8124-Q1 Functional Safety FIT Rate, FMD and Pin FMA | PDF | HTML | Apr 16, 2026 | |
| Application note | Scalable SPI GPIO Expansion for Automotive ECU Design | PDF | HTML | Mar 19, 2026 | |
| Application brief | Understanding the SPI Bus | PDF | HTML | Aug 22, 2025 |
For additional terms or required resources, click any title below to view the detail page where available.
The TXE81XXEVM allows the evaluation of the TXE81XX family of SPI I/O expanders. This EVM supports TXE8116, TXE8124, and TXE8148 (16-bit, 24-bit, and 48-bit, respectively) in the leaded package type DGS(24 and 32) and DGG (56). The EVM provides access to many test points and headers to accompany (...)
This reference design demonstrates trends in advanced automotive 48V low voltage rail architectures. The design includes the 48V backbone architecture and 48V to 12V power conversion. The reference design highlights 48V load drivers across key products. These products include high side switches (...)
| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| VSSOP (DGS) | 32 | Ultra Librarian |
| VQFN (RHB) | 32 | Ultra Librarian |
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