The DSLVDS1047 device is a quad CMOS flow-through differential line driver designed for applications requiring ultra-low power dissipation and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) using Low Voltage Differential Signaling (LVDS) technology.
The DSLVDS1047 accepts low voltage TTL/CMOS input levels and translates them to low voltage
(350 mV) differential output signals. In addition, the driver supports a TRI-STATE function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 13 mW typical. The DSLVDS1047 has a flow-through pinout for easy PCB layout.
The EN and EN* inputs are ANDed together and control the TRI-STATE outputs. The enables are common to all four drivers. The and companion line receiver (DSLVDS1048) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.
| Type | Title | Date | ||
|---|---|---|---|---|
| * | Data sheet | DSLVDS1047 3.3-V LVDS Quad Channel High-Speed Differential Line Driver datasheet | PDF | HTML | 27 Sep 2018 |
| Application note | Applications of Low-Voltage Differential Signaling (LVDS) in LED Walls | 29 Oct 2020 | ||
| Application note | Applications of Low-Voltage Differential Signaling (LVDS) in Ultrasound Scanners | 29 Jun 2019 | ||
| Application brief | LVDS to Improve EMC in Motor Drives | 27 Sep 2018 | ||
| EVM User's guide | DSLVDS1047-1048EVM User's Guide | 23 Aug 2018 | ||
| Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 03 Aug 2018 | ||
| Application brief | How to Terminate LVDS Connections with DC and AC Coupling | 16 May 2018 | ||
| Application note | An Overview of LVDS Technology | 05 Oct 1998 |
For additional terms or required resources, click any title below to view the detail page where available.
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| Package | Pins | CAD symbols, footprints & 3D models |
|---|---|---|
| TSSOP (PW) | 16 | Ultra Librarian |
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