产品详情

Configuration Crosspoint/exchange Number of channels 10 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 5 CON (typ) (pF) 7 ON-state leakage current (max) (µA) 20 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Signal path translation Input/output continuous current (max) (mA) 100 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
Configuration Crosspoint/exchange Number of channels 10 Power supply voltage - single (V) 2.5, 3.3 Protocols Analog Ron (typ) (Ω) 5 CON (typ) (pF) 7 ON-state leakage current (max) (µA) 20 Operating temperature range (°C) -40 to 85 Features Powered-off protection, Signal path translation Input/output continuous current (max) (mA) 100 Rating Catalog Drain supply voltage (max) (V) 3.6 Supply voltage (max) (V) 3.6
SOIC (DW) 24 159.65 mm² 15.5 x 10.3 TSSOP (PW) 24 49.92 mm² 7.8 x 6.4 TVSOP (DGV) 24 32 mm² 5 x 6.4
  • Output Voltage Translation Tracks VCC
  • Supports Mixed-Mode Signal Operation On All Data I/O Ports
    • 5-V Input Down To 3.3-V Output Level Shift With 3.3-V VCC
    • 5-V/3.3-V Input Down To 2.5-V Output Level Shift With 2.5-V VCC
  • 5-V-Tolerant I/Os With Device Powered-Up or Powered-Down
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 5 Typical)
  • Low Input/Output Capacitance Minimizes Loading (Cio(OFF) = 8 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 20 µA Max)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Digital Applications: Level Translation, Memory Interleaving, Bus Isolation
  • Ideal for Low-Power Portable Equipment

  • Output Voltage Translation Tracks VCC
  • Supports Mixed-Mode Signal Operation On All Data I/O Ports
    • 5-V Input Down To 3.3-V Output Level Shift With 3.3-V VCC
    • 5-V/3.3-V Input Down To 2.5-V Output Level Shift With 2.5-V VCC
  • 5-V-Tolerant I/Os With Device Powered-Up or Powered-Down
  • Bidirectional Data Flow, With Near-Zero Propagation Delay
  • Low ON-State Resistance (ron) Characteristics (ron = 5 Typical)
  • Low Input/Output Capacitance Minimizes Loading (Cio(OFF) = 8 pF Typical)
  • Data and Control Inputs Provide Undershoot Clamp Diodes
  • Low Power Consumption (ICC = 20 µA Max)
  • VCC Operating Range From 2.3 V to 3.6 V
  • Data I/Os Support 0 to 5-V Signaling Levels (0.8-V, 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, 5-V)
  • Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs
  • Ioff Supports Partial-Power-Down Mode Operation
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)
  • Supports Digital Applications: Level Translation, Memory Interleaving, Bus Isolation
  • Ideal for Low-Power Portable Equipment

The SN74CB3T3383 is a high-speed TTL-compatible FET bus-exchange switch with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T3383 supports systems using 5-V TTL, 3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels (see Figure 1).

The SN74CB3T3383 is organized as a 10-bit bus switch or as a 5-bit bus-exchange with enable (BE)\ input. When used as a 5-bit bus-exchange, the device provides data exchanging between four signal ports. When BE\ is low, the bus-exchange switch is ON, and the select input (BX) controls the data path. When BE\ is high, the bus-exchange switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, BE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74CB3T3383 is a high-speed TTL-compatible FET bus-exchange switch with low ON-state resistance (ron), allowing for minimal propagation delay. The device fully supports mixed-mode signal operation on all data I/O ports by providing voltage translation that tracks VCC. The SN74CB3T3383 supports systems using 5-V TTL, 3.3-V LVTTL, and 2.5-V CMOS switching standards, as well as user-defined switching levels (see Figure 1).

The SN74CB3T3383 is organized as a 10-bit bus switch or as a 5-bit bus-exchange with enable (BE)\ input. When used as a 5-bit bus-exchange, the device provides data exchanging between four signal ports. When BE\ is low, the bus-exchange switch is ON, and the select input (BX) controls the data path. When BE\ is high, the bus-exchange switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff feature ensures that damaging current will not backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, BE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

下载 观看带字幕的视频 视频

技术文档

star =有关此产品的 TI 精选热门文档
未找到结果。请清除搜索并重试。
查看全部 14
类型 标题 下载最新的英语版本 日期
* 数据表 SN74CB3T3383 数据表 (Rev. A) 2004年 12月 2日
应用手册 选择正确的德州仪器 (TI) 信号开关 (Rev. E) PDF | HTML 英语版 (Rev.E) PDF | HTML 2022年 8月 5日
应用手册 CBT-C、CB3T 和 CB3Q 信号开关系列 (Rev. C) PDF | HTML 英语版 (Rev.C) PDF | HTML 2022年 3月 11日
应用手册 多路复用器和信号开关词汇表 (Rev. B) 英语版 (Rev.B) PDF | HTML 2022年 3月 11日
选择指南 Logic Guide (Rev. AB) 2017年 6月 12日
应用手册 How to Select Little Logic (Rev. A) 2016年 7月 26日
应用手册 Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
选择指南 逻辑器件指南 2014 (Rev. AA) 最新英语版本 (Rev.AB) 2014年 11月 17日
用户指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
应用手册 选择正确的电平转换解决方案 (Rev. A) 英语版 (Rev.A) 2006年 3月 23日
更多文献资料 Digital Bus Switch Selection Guide (Rev. A) 2004年 11月 10日
应用手册 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
用户指南 Signal Switch Data Book (Rev. A) 2003年 11月 14日
应用手册 Bus FET Switch Solutions for Live Insertion Applications 2003年 2月 7日

设计和开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

接口适配器

LEADED-ADAPTER1 — 用于快速测试 TI 5、8、10、16 和 24 引脚引线式封装的表面贴装转 DIP 接头适配器

EVM-LEADED1 板可对 TI 的常见引线式封装进行快速测试和电路板试验。该评估板具有足够的空间,可将 TI 的 D、DBQ、DCT、DCU、DDF、DGS、DGV 和 PW 表面贴装封装转换为 100mil DIP 接头。     

用户指南: PDF
TI.com 上无现货
仿真模型

HSPICE Model for SN74CB3T3383

SCDJ027.ZIP (101 KB) - HSpice Model
封装 引脚 CAD 符号、封装和 3D 模型
SOIC (DW) 24 Ultra Librarian
TSSOP (PW) 24 Ultra Librarian
TVSOP (DGV) 24 Ultra Librarian

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

推荐产品可能包含与 TI 此产品相关的参数、评估模块或参考设计。

支持和培训

视频